mb/google/hatch/variants/kindred: Update memory strap GPIOs
According to the latest schematic (b:127996858#comment38), MEM_CONFIG_0 --> GPP_H19 MEM_CONFIG_1 --> GPP_H22 MEM_CONFIG_2 --> GPP_F10 MEM_CONFIG_3 --> GPP_F3 BUG=none BRANCH=none TEST=Boot kindred proto board Change-Id: Ib79f9454116583a94fe1fd53a37ed928d32988d5 Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33617 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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@ -18,3 +18,6 @@ SPD_SOURCES += 8G_2400 # 0b010
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SPD_SOURCES += 8G_2666 # 0b011
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SPD_SOURCES += 16G_2400 # 0b100
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SPD_SOURCES += 16G_2666 # 0b101
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bootblock-y += gpio.c
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ramstage-y += gpio.c
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@ -0,0 +1,54 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2019 Google LLC
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
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* GNU General Public License for more details.
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*/
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#include <arch/acpi.h>
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#include <baseboard/gpio.h>
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#include <baseboard/variants.h>
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#include <commonlib/helpers.h>
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static const struct pad_config gpio_table[] = {
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/* F3 : MEM_STRAP_3 */
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PAD_CFG_GPI(GPP_F3, NONE, PLTRST),
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/* F10 : MEM_STRAP_2 */
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PAD_CFG_GPI(GPP_F10, NONE, PLTRST),
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/* H19 : MEM_STRAP_0 */
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PAD_CFG_GPI(GPP_H19, NONE, PLTRST),
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/* H22 : MEM_STRAP_1 */
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PAD_CFG_GPI(GPP_H22, NONE, PLTRST),
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};
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const struct pad_config *override_gpio_table(size_t *num)
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{
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*num = ARRAY_SIZE(gpio_table);
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return gpio_table;
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}
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/* GPIOs configured before ramstage */
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static const struct pad_config early_gpio_table[] = {
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/* F3 : MEM_STRAP_3 */
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PAD_CFG_GPI(GPP_F3, NONE, PLTRST),
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/* F10 : MEM_STRAP_2 */
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PAD_CFG_GPI(GPP_F10, NONE, PLTRST),
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/* H19 : MEM_STRAP_0 */
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PAD_CFG_GPI(GPP_H19, NONE, PLTRST),
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/* H22 : MEM_STRAP_1 */
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PAD_CFG_GPI(GPP_H22, NONE, PLTRST),
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};
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const struct pad_config *override_early_gpio_table(size_t *num)
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{
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*num = ARRAY_SIZE(early_gpio_table);
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return early_gpio_table;
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}
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@ -19,9 +19,9 @@
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#include <baseboard/gpio.h>
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/* Memory configuration board straps */
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#define GPIO_MEM_CONFIG_0 GPP_F20
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#define GPIO_MEM_CONFIG_1 GPP_F21
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#define GPIO_MEM_CONFIG_2 GPP_F11
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#define GPIO_MEM_CONFIG_3 GPP_F22
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#define GPIO_MEM_CONFIG_0 GPP_H19
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#define GPIO_MEM_CONFIG_1 GPP_H22
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#define GPIO_MEM_CONFIG_2 GPP_F10
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#define GPIO_MEM_CONFIG_3 GPP_F3
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#endif
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