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intel/i945: Use 'bool' for dual_channel and interleaved 

Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: I055847c9b08795683fe2e1dfd7fcde49901fc973
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67925
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Elyes Haouas 2022-09-28 14:14:05 +02:00 committed by Martin Roth
parent 411023af72
commit 4944609bd0
2 changed files with 13 additions and 10 deletions
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17
src/northbridge/intel/i945/raminit.c
View File

@ -314,10 +314,10 @@ static void gather_common_timing(struct sys_info *sysinfo, struct timings *saved
printk(BIOS_DEBUG, "This mainboard supports "); printk(BIOS_DEBUG, "This mainboard supports ");
if (sdram_capabilities_dual_channel()) { if (sdram_capabilities_dual_channel()) {
sysinfo->dual_channel = 1; sysinfo->dual_channel = true;
printk(BIOS_DEBUG, "Dual Channel Operation.\n"); printk(BIOS_DEBUG, "Dual Channel Operation.\n");
} else { } else {
sysinfo->dual_channel = 0; sysinfo->dual_channel = false;
printk(BIOS_DEBUG, "only Single Channel Operation.\n"); printk(BIOS_DEBUG, "only Single Channel Operation.\n");
} }
@ -765,7 +765,7 @@ static const u8 single_channel_slew_group_lookup[] = {
DQ2330, NC, CTL3215, NC, CLK2030, CLK2030, DQ2030, CMD3210 DQ2330, NC, CTL3215, NC, CLK2030, CLK2030, DQ2030, CMD3210
}; };
static const u32 *slew_group_lookup(int dual_channel, int index) static const u32 *slew_group_lookup(bool dual_channel, int index)
{ {
const u8 *slew_group; const u8 *slew_group;
/* Dual Channel needs different tables. */ /* Dual Channel needs different tables. */
@ -902,7 +902,8 @@ static const u8 single_channel_strength_multiplier[] = {
static void sdram_rcomp_buffer_strength_and_slew(struct sys_info *sysinfo) static void sdram_rcomp_buffer_strength_and_slew(struct sys_info *sysinfo)
{ {
const u8 *strength_multiplier; const u8 *strength_multiplier;
int idx, dual_channel; int idx;
bool dual_channel;
/* Set Strength Multipliers */ /* Set Strength Multipliers */
@ -910,12 +911,12 @@ static void sdram_rcomp_buffer_strength_and_slew(struct sys_info *sysinfo)
if (sdram_capabilities_dual_channel()) { if (sdram_capabilities_dual_channel()) {
printk(BIOS_DEBUG, "Programming Dual Channel RCOMP\n"); printk(BIOS_DEBUG, "Programming Dual Channel RCOMP\n");
strength_multiplier = dual_channel_strength_multiplier; strength_multiplier = dual_channel_strength_multiplier;
dual_channel = 1; dual_channel = true;
idx = 5 * sysinfo->dimm[0] + sysinfo->dimm[2]; idx = 5 * sysinfo->dimm[0] + sysinfo->dimm[2];
} else { } else {
printk(BIOS_DEBUG, "Programming Single Channel RCOMP\n"); printk(BIOS_DEBUG, "Programming Single Channel RCOMP\n");
strength_multiplier = single_channel_strength_multiplier; strength_multiplier = single_channel_strength_multiplier;
dual_channel = 0; dual_channel = false;
idx = 5 * sysinfo->dimm[0] + sysinfo->dimm[1]; idx = 5 * sysinfo->dimm[0] + sysinfo->dimm[1];
} }
@ -1536,9 +1537,9 @@ static void sdram_set_channel_mode(struct sys_info *sysinfo)
(sysinfo->banksize[4] + sysinfo->banksize[5] + (sysinfo->banksize[4] + sysinfo->banksize[5] +
sysinfo->banksize[6] + sysinfo->banksize[7]))) { sysinfo->banksize[6] + sysinfo->banksize[7]))) {
/* Both channels equipped with DIMMs of the same size */ /* Both channels equipped with DIMMs of the same size */
sysinfo->interleaved = 1; sysinfo->interleaved = true;
} else { } else {
sysinfo->interleaved = 0; sysinfo->interleaved = false;
} }
reg32 = mchbar_read32(DCC); reg32 = mchbar_read32(DCC);

6
src/northbridge/intel/i945/raminit.h
View File

@ -3,6 +3,8 @@
#ifndef RAMINIT_H #ifndef RAMINIT_H
#define RAMINIT_H #define RAMINIT_H
#include <types.h>
#define DIMM_SOCKETS 2 #define DIMM_SOCKETS 2
#define DIMM_TCO_BASE 0x30 #define DIMM_TCO_BASE 0x30
@ -24,8 +26,8 @@ struct sys_info {
u8 cas; /* 3, 4 or 5 */ u8 cas; /* 3, 4 or 5 */
u8 refresh; /* 0 = 15.6us, 1 = 7.8us */ u8 refresh; /* 0 = 15.6us, 1 = 7.8us */
u8 dual_channel; /* 0 or 1 */ bool dual_channel;
u8 interleaved; bool interleaved;
u8 mvco4x; /* 0 (8x) or 1 (4x) */ u8 mvco4x; /* 0 (8x) or 1 (4x) */
u8 clkcfg_bit7; u8 clkcfg_bit7;