From 496e4e95c4cba9f5414cd8137fa151a9b3fe0b21 Mon Sep 17 00:00:00 2001 From: Joey Peng Date: Wed, 22 Mar 2023 11:21:24 +0800 Subject: [PATCH] mb/google/brya/var/taeko: Correct comments to prevent confusion The PCIE RP 9 on taeko is for eMMC. Correct the comments to prevent confusion. BUG=b:271003060 Signed-off-by: Joey Peng Change-Id: Ib49942b682d1817af9e8b4b61044aa170e18fea8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/73885 Tested-by: build bot (Jenkins) Reviewed-by: Eric Lai Reviewed-by: YH Lin Reviewed-by: Tarun Tuli --- src/mainboard/google/brya/variants/taeko/overridetree.cb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mainboard/google/brya/variants/taeko/overridetree.cb b/src/mainboard/google/brya/variants/taeko/overridetree.cb index 00d7e69b03..cdfd2ff49d 100644 --- a/src/mainboard/google/brya/variants/taeko/overridetree.cb +++ b/src/mainboard/google/brya/variants/taeko/overridetree.cb @@ -532,7 +532,7 @@ chip soc/intel/alderlake end end device ref pcie_rp9 on - # Enable NVMe PCIE 9 using clk 0 + # Enable PCIE 9 using clk 0 for eMMC register "pch_pcie_rp[PCH_RP(9)]" = "{ .clk_src = 0, .clk_req = 0,