soc/intel: Add TGL-H CPUID

Change-Id: I5a76bcbd6661648a9284d683eb360ec956a9f9a6
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56942
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/include/cpu/intel/cpu_ids.h

@@ -47,6 +47,7 @@
 #define CPUID_COMETLAKE_H_S_10_2_Q0_P1	0xa0654
 #define CPUID_TIGERLAKE_A0		0x806c0
 #define CPUID_TIGERLAKE_B0		0x806c1
+#define CPUID_TIGERLAKE_R0		0x806d1
 #define CPUID_ELKHARTLAKE_A0		0x90660
 #define CPUID_ELKHARTLAKE_B0		0x90661
 #define CPUID_ALDERLAKE_S_A0		0x90670

src/soc/intel/common/block/cpu/mp_init.c

@@ -63,6 +63,7 @@ static const struct cpu_device_id cpu_table[] = {
 	{ X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_10_2_Q0_P1 },
 	{ X86_VENDOR_INTEL, CPUID_TIGERLAKE_A0 },
 	{ X86_VENDOR_INTEL, CPUID_TIGERLAKE_B0 },
+	{ X86_VENDOR_INTEL, CPUID_TIGERLAKE_R0 },
 	{ X86_VENDOR_INTEL, CPUID_ELKHARTLAKE_A0 },
 	{ X86_VENDOR_INTEL, CPUID_ELKHARTLAKE_B0 },
 	{ X86_VENDOR_INTEL, CPUID_JASPERLAKE_A0 },

src/soc/intel/tigerlake/bootblock/report_platform.c

@@ -25,6 +25,7 @@ static struct {
 } cpu_table[] = {
 	{ CPUID_TIGERLAKE_A0, "Tigerlake A0" },
 	{ CPUID_TIGERLAKE_B0, "Tigerlake B0" },
+	{ CPUID_TIGERLAKE_R0, "Tigerlake R0" },
 };
 
 static struct {