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soc/amd/picasso: Enable stage cache only with ACPI resume 

Make the option match the change in I7c3b3ec.
  "stoneyridge/Kconfig: Enable stage cache based on HAVE_ACPI_RESUME"

Change-Id: I7fa13428ec0119b61f429116a52986067e833bdf
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34418
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Marshall Dawson 2019-07-16 12:56:03 -06:00 committed by Martin Roth
parent 917cc5cf25
commit 498de91e45
1 changed files with 1 additions and 1 deletions
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src/soc/amd/picasso/Kconfig
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@ -52,7 +52,7 @@ config CPU_SPECIFIC_OPTIONS
select C_ENVIRONMENT_BOOTBLOCK
select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH
select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM if HAVE_ACPI_RESUME
select PARALLEL_MP
select PARALLEL_MP_AP_WORK
select HAVE_SMI_HANDLER