diff --git a/src/cpu/via/car/cache_as_ram.inc b/src/cpu/via/car/cache_as_ram.inc
index a131517cf4..4ac82daded 100644
--- a/src/cpu/via/car/cache_as_ram.inc
+++ b/src/cpu/via/car/cache_as_ram.inc
@@ -153,18 +153,6 @@ clear_fixed_var_mtrr_out:
 	xorl	%eax, %eax
 	rep	stosl
 
-#ifdef CARTEST
-	/*
-	 * IMPORTANT: The following calculation _must_ be done at runtime. See
-	 * https://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
-	 */
-	movl	$copy_and_run, %esi
-	andl	$(~(CONFIG_XIP_ROM_SIZE - 1)), %ei
-	movl	%esi, %edi
-	movl	$(CONFIG_XIP_ROM_SIZE >> 2), %ecx
-	rep	lodsl
-#endif
-
 	/*
 	 * The key point of this CAR code is C7 cache does not turn into
 	 * "no fill" mode, which is not compatible with general CAR code.
@@ -173,26 +161,6 @@ clear_fixed_var_mtrr_out:
 	movl	$(CacheBase + CacheSize - 4), %eax
 	movl	%eax, %esp
 
-#ifdef CARTEST
-testok:
-	post_code(0x40)
-	xorl	%edx, %edx
-	xorl	%eax, %eax
-	movl	$0x5c5c, %edx
-	pushl	%edx
-	pushl	%edx
-	pushl	%edx
-	pushl	%edx
-	pushl	%edx
-	popl	%esi
-	popl	%esi
-	popl	%eax
-	popl	%eax
-	popl	%eax
-	cmpl	%edx, %eax
-	jne	stackerr
-#endif
-
 	/* Restore the BIST result. */
 	movl	%ebp, %eax