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soc/mediatek/mt8192: Remove redundant SPM register definition 

A complete SPM register definition is defined in include/soc/spm.h.
Remove the redundant definition from include/soc/pmif_spmi.h.

TEST=emerge-asurada coreboot
BRANCH=asurada

Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Change-Id: If55e7adabdf32bb4312b910dce9a55621a8da380
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52561
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Yidi Lin 2021-02-09 19:15:04 +08:00 committed by Hung-Te Lin
parent 450fbe042e
commit 49b47eab81
3 changed files with 4 additions and 10 deletions
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8
src/soc/mediatek/mt8192/include/soc/pmif_spmi.h
View File

@ -24,13 +24,6 @@ struct mtk_iocfg_bm_regs {
}; };
check_member(mtk_iocfg_bm_regs, drv_cfg2, 0x20); check_member(mtk_iocfg_bm_regs, drv_cfg2, 0x20);
struct mtk_spm_regs {
u32 poweron_config_en;
u32 reserved[263];
u32 ulposc_con;
};
check_member(mtk_spm_regs, ulposc_con, 0x420);
struct mtk_spmi_mst_reg { struct mtk_spmi_mst_reg {
u32 op_st_ctrl; u32 op_st_ctrl;
u32 grp_id_en; u32 grp_id_en;
@ -53,7 +46,6 @@ check_member(mtk_spmi_mst_reg, mst_dbg, 0xfc);
#define mtk_rug ((struct mtk_rgu_regs *)RGU_BASE) #define mtk_rug ((struct mtk_rgu_regs *)RGU_BASE)
#define mtk_iocfg_bm ((struct mtk_iocfg_bm_regs *)IOCFG_BM_BASE) #define mtk_iocfg_bm ((struct mtk_iocfg_bm_regs *)IOCFG_BM_BASE)
#define mtk_spm ((struct mtk_spm_regs *)SPM_BASE)
#define mtk_spmi_mst ((struct mtk_spmi_mst_reg *)SPMI_MST_BASE) #define mtk_spmi_mst ((struct mtk_spmi_mst_reg *)SPMI_MST_BASE)
struct cali { struct cali {

1
src/soc/mediatek/mt8192/include/soc/spm.h
View File

@ -639,6 +639,7 @@ check_member(mtk_spm_regs, root_core_addr, 0x2a4);
check_member(mtk_spm_regs, spm2sw_mailbox_0, 0x2d0); check_member(mtk_spm_regs, spm2sw_mailbox_0, 0x2d0);
check_member(mtk_spm_regs, peri_pwr_con, 0x3c8); check_member(mtk_spm_regs, peri_pwr_con, 0x3c8);
check_member(mtk_spm_regs, spm_mem_ck_sel, 0x400); check_member(mtk_spm_regs, spm_mem_ck_sel, 0x400);
check_member(mtk_spm_regs, ulposc_con, 0x420);
check_member(mtk_spm_regs, spm_force_dvfs, 0x4fc); check_member(mtk_spm_regs, spm_force_dvfs, 0x4fc);
check_member(mtk_spm_regs, spm_sw_flag_0, 0x600); check_member(mtk_spm_regs, spm_sw_flag_0, 0x600);
check_member(mtk_spm_regs, spm_sw_flag_1, 0x608); check_member(mtk_spm_regs, spm_sw_flag_1, 0x608);

5
src/soc/mediatek/mt8192/pmif_clk.c
View File

@ -10,6 +10,7 @@
#include <soc/pmif.h> #include <soc/pmif.h>
#include <soc/pmif_sw.h> #include <soc/pmif_sw.h>
#include <soc/pmif_spmi.h> #include <soc/pmif_spmi.h>
#include <soc/spm.h>
/* APMIXED, ULPOSC1_CON0 */ /* APMIXED, ULPOSC1_CON0 */
DEFINE_BITFIELD(OSC1_CALI, 6, 0) DEFINE_BITFIELD(OSC1_CALI, 6, 0)
@ -130,8 +131,8 @@ static int pmif_init_ulposc(void)
pmif_ulposc_config(); pmif_ulposc_config();
/* enable spm swinf */ /* enable spm swinf */
if (!READ32_BITFIELD(&mtk_spm->poweron_config_en, BCLK_CG_EN)) if (!READ32_BITFIELD(&mtk_spm->poweron_config_set, BCLK_CG_EN))
SET32_BITFIELDS(&mtk_spm->poweron_config_en, BCLK_CG_EN, 1, SET32_BITFIELDS(&mtk_spm->poweron_config_set, BCLK_CG_EN, 1,
PROJECT_CODE, 0xb16); PROJECT_CODE, 0xb16);
/* turn on ulposc */ /* turn on ulposc */