soc/intel/skylake: Change name pmc_tco_regs to smbus_tco_regs

The function name "pmc_tco_regs" is changed to "smbus_tco_regs"
since TCO offsets belongs to SMBUS PCI device.

BUG=none
BRANCH=none
TEST=Built and booted kunimitsu

Change-Id: I4ac26df81a8221329f2b45053dd5243cd02f8ad7
Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com>
Reviewed-on: https://review.coreboot.org/16155
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This commit is contained in:
Barnali Sarkar 2016-08-12 00:05:27 +05:30 committed by Martin Roth
parent 289f0578ce
commit 49eca13353
5 changed files with 6 additions and 6 deletions

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@ -106,7 +106,7 @@ static void pch_finalize_script(void)
write32(spibar + SPIBAR_HSFS, hsfs); write32(spibar + SPIBAR_HSFS, hsfs);
/*TCO Lock down */ /*TCO Lock down */
tcobase = pmc_tco_regs(); tcobase = smbus_tco_regs();
tcocnt = inw(tcobase + TCO1_CNT); tcocnt = inw(tcobase + TCO1_CNT);
tcocnt |= TCO_LOCK; tcocnt |= TCO_LOCK;
outw(tcocnt, tcobase + TCO1_CNT); outw(tcocnt, tcobase + TCO1_CNT);

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@ -181,7 +181,7 @@ int acpi_sci_irq(void);
/* Get base address PMC memory mapped registers. */ /* Get base address PMC memory mapped registers. */
uint8_t *pmc_mmio_regs(void); uint8_t *pmc_mmio_regs(void);
/* Get base address of TCO I/O registers. */ /* Get base address of TCO I/O registers. */
uint16_t pmc_tco_regs(void); uint16_t smbus_tco_regs(void);
static inline int deep_s3_enabled(void) static inline int deep_s3_enabled(void)
{ {

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@ -218,7 +218,7 @@ static u32 reset_tco_status(void)
u16 tco2_sts; u16 tco2_sts;
u16 tcobase; u16 tcobase;
tcobase = pmc_tco_regs(); tcobase = smbus_tco_regs();
/* TCO Status 2 register*/ /* TCO Status 2 register*/
tco2_sts = inw(tcobase + TCO2_STS); tco2_sts = inw(tcobase + TCO2_STS);
@ -421,7 +421,7 @@ uint8_t *pmc_mmio_regs(void)
return (void *)(uintptr_t)reg32; return (void *)(uintptr_t)reg32;
} }
uint16_t pmc_tco_regs(void) uint16_t smbus_tco_regs(void)
{ {
uint16_t reg16; uint16_t reg16;

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@ -94,7 +94,7 @@ static void pch_device_init(void)
pci_write_config32(dev, ACTL, reg32); pci_write_config32(dev, ACTL, reg32);
/* TCO timer halt */ /* TCO timer halt */
tcobase = pmc_tco_regs(); tcobase = smbus_tco_regs();
tcocnt = inw(tcobase + TCO1_CNT); tcocnt = inw(tcobase + TCO1_CNT);
tcocnt |= TCO_TMR_HLT; tcocnt |= TCO_TMR_HLT;
outw(tcocnt, tcobase + TCO1_CNT); outw(tcocnt, tcobase + TCO1_CNT);

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@ -131,7 +131,7 @@ struct chipset_power_state *fill_power_state(void)
uint8_t *pmc; uint8_t *pmc;
struct chipset_power_state *ps = car_get_var_ptr(&power_state); struct chipset_power_state *ps = car_get_var_ptr(&power_state);
tcobase = pmc_tco_regs(); tcobase = smbus_tco_regs();
ps->pm1_sts = inw(ACPI_BASE_ADDRESS + PM1_STS); ps->pm1_sts = inw(ACPI_BASE_ADDRESS + PM1_STS);
ps->pm1_en = inw(ACPI_BASE_ADDRESS + PM1_EN); ps->pm1_en = inw(ACPI_BASE_ADDRESS + PM1_EN);