This patch adds support for VIA SPI controller on VT8237S. It is similar with
few documented exceptions to ICH7 SPI controller. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3398 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -187,6 +187,24 @@ static int enable_flash_ich_dc(struct pci_dev *dev, const char *name)
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void *ich_spibar = NULL;
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static int enable_flash_vt8237s_spi(struct pci_dev *dev, const char *name) {
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uint32_t mmio_base;
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mmio_base = (pci_read_long(dev, 0xbc)) << 8;
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printf_debug("MMIO base at = 0x%x\n", mmio_base);
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ich_spibar = mmap(NULL, 0x70, PROT_READ | PROT_WRITE, MAP_SHARED,
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fd_mem, mmio_base);
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if (ich_spibar == MAP_FAILED) {
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perror("Can't mmap memory using " MEM_DEV);
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exit(1);
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}
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printf_debug("0x6c: 0x%04x (CLOCK/DEBUG)\n", *(uint16_t *)(ich_spibar + 0x6c));
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viaspi_detected = 1;
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return 0;
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}
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static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, unsigned long spibar)
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{
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uint8_t old, new, bbs, buc;
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@ -270,6 +288,7 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, unsign
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/* Flag for ICH7 SPI register block */
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int ich7_detected = 0;
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int viaspi_detected = 0;
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static int enable_flash_ich7(struct pci_dev *dev, const char *name)
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{
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@ -660,6 +679,7 @@ static const FLASH_ENABLE enables[] = {
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{0x1106, 0x8231, "VIA VT8231", enable_flash_vt823x},
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{0x1106, 0x3177, "VIA VT8235", enable_flash_vt823x},
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{0x1106, 0x3227, "VIA VT8237", enable_flash_vt823x},
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{0x1106, 0x3372, "VIA VT8237S", enable_flash_vt8237s_spi},
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{0x1106, 0x8324, "VIA CX700", enable_flash_vt823x},
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{0x1106, 0x0686, "VIA VT82C686", enable_flash_amd8111},
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{0x1078, 0x0100, "AMD CS5530(A)", enable_flash_cs5530},
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@ -371,6 +371,7 @@ void print_supported_boards(void);
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int chipset_flash_enable(void);
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void print_supported_chipsets(void);
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extern int ich7_detected;
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extern int viaspi_detected;
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extern int ich9_detected;
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extern void *ich_spibar;
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@ -41,8 +41,6 @@
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#include "flash.h"
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#include "spi.h"
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#define MAXDATABYTES 0x40
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/* ICH9 controller register definition */
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#define ICH9_REG_FADDR 0x08 /* 32 Bits */
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#define ICH9_REG_FDATA0 0x10 /* 64 Bytes */
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@ -81,6 +79,16 @@
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#define SPIS_CDS 0x00000004
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#define SPIS_FCERR 0x00000008
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/* VIA SPI is compatible with ICH7, but maxdata
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to transfer is 16 bytes.
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DATA byte count on ICH7 is 8:13, on VIA 8:11
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bit 12 is port select CS0 CS1
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bit 13 is FAST READ enable
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bit 7 is used with fast read and one shot controls CS de-assert?
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*/
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#define ICH7_REG_SPIC 0x02 /* 16 Bits */
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#define SPIC_SCGO 0x0002
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#define SPIC_ACS 0x0004
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@ -143,9 +151,9 @@ static int program_opcodes(OPCODES * op);
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static int run_opcode(uint8_t nr, OPCODE op, uint32_t offset,
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uint8_t datalength, uint8_t * data);
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static int ich_spi_read_page(struct flashchip *flash, uint8_t * buf,
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int offset);
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int offset, int maxdata);
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static int ich_spi_write_page(struct flashchip *flash, uint8_t * bytes,
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int offset);
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int offset, int maxdata);
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static int ich_spi_erase_block(struct flashchip *flash, int offset);
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OPCODES O_ST_M25P = {
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@ -176,7 +184,7 @@ int program_opcodes(OPCODES * op)
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temp16 = (op->preop[0]);
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/* 8:16 Prefix Opcode 2 */
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temp16 |= ((uint16_t) op->preop[1]) << 8;
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if (ich7_detected) {
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if ((ich7_detected) || (viaspi_detected)) {
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REGWRITE16(ICH7_REG_PREOP, temp16);
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} else if (ich9_detected) {
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REGWRITE16(ICH9_REG_PREOP, temp16);
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@ -188,7 +196,7 @@ int program_opcodes(OPCODES * op)
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temp16 |= ((uint16_t) op->opcode[a].spi_type) << (a * 2);
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}
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if (ich7_detected) {
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if ((ich7_detected) || (viaspi_detected)) {
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REGWRITE16(ICH7_REG_OPTYPE, temp16);
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} else if (ich9_detected) {
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REGWRITE16(ICH9_REG_OPTYPE, temp16);
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@ -201,7 +209,7 @@ int program_opcodes(OPCODES * op)
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temp32 |= ((uint32_t) op->opcode[a].opcode) << (a * 8);
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}
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if (ich7_detected) {
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if ((ich7_detected) || (viaspi_detected)) {
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REGWRITE32(ICH7_REG_OPMENU, temp32);
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} else if (ich9_detected) {
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REGWRITE32(ICH9_REG_OPMENU, temp32);
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@ -215,7 +223,7 @@ int program_opcodes(OPCODES * op)
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((uint32_t) op->opcode[a].opcode) << ((a - 4) * 8);
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}
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if (ich7_detected) {
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if ((ich7_detected) || (viaspi_detected)) {
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REGWRITE32(ICH7_REG_OPMENU + 4, temp32);
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} else if (ich9_detected) {
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REGWRITE32(ICH9_REG_OPMENU + 4, temp32);
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@ -225,7 +233,7 @@ int program_opcodes(OPCODES * op)
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}
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static int ich7_run_opcode(uint8_t nr, OPCODE op, uint32_t offset,
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uint8_t datalength, uint8_t * data)
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uint8_t datalength, uint8_t * data, int maxdata)
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{
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int write_cmd = 0;
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int timeout;
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@ -275,7 +283,7 @@ static int ich7_run_opcode(uint8_t nr, OPCODE op, uint32_t offset,
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if (datalength != 0) {
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temp16 |= SPIC_DS;
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temp16 |= ((uint16_t) ((datalength - 1) & 0x3f)) << 8;
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temp16 |= ((uint32_t) ((datalength - 1) & (maxdata - 1))) << 8;
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}
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/* Select opcode */
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@ -431,10 +439,11 @@ static int run_opcode(uint8_t nr, OPCODE op, uint32_t offset,
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uint8_t datalength, uint8_t * data)
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{
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if (ich7_detected)
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return ich7_run_opcode(nr, op, offset, datalength, data);
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else if (ich9_detected) {
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return ich7_run_opcode(nr, op, offset, datalength, data, 64);
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else if (viaspi_detected)
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return ich7_run_opcode(nr, op, offset, datalength, data, 16);
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else if (ich9_detected)
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return ich9_run_opcode(nr, op, offset, datalength, data);
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}
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/* If we ever get here, something really weird happened */
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return -1;
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@ -455,7 +464,7 @@ static int ich_spi_erase_block(struct flashchip *flash, int offset)
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return 0;
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}
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static int ich_spi_read_page(struct flashchip *flash, uint8_t * buf, int offset)
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static int ich_spi_read_page(struct flashchip *flash, uint8_t * buf, int offset, int maxdata)
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{
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int page_size = flash->page_size;
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uint32_t remaining = flash->page_size;
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@ -464,8 +473,8 @@ static int ich_spi_read_page(struct flashchip *flash, uint8_t * buf, int offset)
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printf_debug("ich_spi_read_page: offset=%d, number=%d, buf=%p\n",
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offset, page_size, buf);
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for (a = 0; a < page_size; a += MAXDATABYTES) {
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if (remaining < MAXDATABYTES) {
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for (a = 0; a < page_size; a += maxdata) {
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if (remaining < maxdata) {
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if (run_opcode
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(1, curopcodes->opcode[1],
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@ -478,12 +487,12 @@ static int ich_spi_read_page(struct flashchip *flash, uint8_t * buf, int offset)
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} else {
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if (run_opcode
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(1, curopcodes->opcode[1],
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offset + (page_size - remaining), MAXDATABYTES,
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offset + (page_size - remaining), maxdata,
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&buf[page_size - remaining]) != 0) {
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printf_debug("Error reading");
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return 1;
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}
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remaining -= MAXDATABYTES;
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remaining -= maxdata;
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}
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}
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@ -491,7 +500,7 @@ static int ich_spi_read_page(struct flashchip *flash, uint8_t * buf, int offset)
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}
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static int ich_spi_write_page(struct flashchip *flash, uint8_t * bytes,
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int offset)
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int offset, int maxdata)
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{
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int page_size = flash->page_size;
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uint32_t remaining = page_size;
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printf_debug("ich_spi_write_page: offset=%d, number=%d, buf=%p\n",
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offset, page_size, bytes);
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for (a = 0; a < page_size; a += MAXDATABYTES) {
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if (remaining < MAXDATABYTES) {
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for (a = 0; a < page_size; a += maxdata) {
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if (remaining < maxdata) {
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if (run_opcode
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(0, curopcodes->opcode[0],
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offset + (page_size - remaining), remaining,
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} else {
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if (run_opcode
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(0, curopcodes->opcode[0],
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offset + (page_size - remaining), MAXDATABYTES,
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offset + (page_size - remaining), maxdata,
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&bytes[page_size - remaining]) != 0) {
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printf_debug("Error writing");
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return 1;
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}
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remaining -= MAXDATABYTES;
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remaining -= maxdata;
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}
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}
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@ -530,10 +539,15 @@ int ich_spi_read(struct flashchip *flash, uint8_t * buf)
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int i, rc = 0;
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int total_size = flash->total_size * 1024;
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int page_size = flash->page_size;
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int maxdata = 64;
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if (viaspi_detected) {
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maxdata = 16;
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}
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for (i = 0; (i < total_size / page_size) && (rc == 0); i++) {
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rc = ich_spi_read_page(flash, (void *)(buf + i * page_size),
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i * page_size);
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i * page_size, maxdata);
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}
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return rc;
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int total_size = flash->total_size * 1024;
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int page_size = flash->page_size;
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int erase_size = 64 * 1024;
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int maxdata = 64;
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spi_disable_blockprotect();
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@ -557,9 +572,12 @@ int ich_spi_write(struct flashchip *flash, uint8_t * buf)
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break;
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}
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if (viaspi_detected) {
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maxdata = 16;
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}
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for (j = 0; j < erase_size / page_size; j++) {
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ich_spi_write_page(flash, (void *)(buf + (i * erase_size) + (j * page_size)),
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(i * erase_size) + (j * page_size));
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(i * erase_size) + (j * page_size), maxdata);
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}
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}
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@ -36,7 +36,7 @@ int spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char
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{
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if (it8716f_flashport)
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return it8716f_spi_command(writecnt, readcnt, writearr, readarr);
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else if (ich7_detected)
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else if ((ich7_detected) || (viaspi_detected))
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return ich_spi_command(writecnt, readcnt, writearr, readarr);
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else if (ich9_detected)
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return ich_spi_command(writecnt, readcnt, writearr, readarr);
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@ -360,7 +360,7 @@ int spi_chip_read(struct flashchip *flash, uint8_t *buf)
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{
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if (it8716f_flashport)
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return it8716f_spi_chip_read(flash, buf);
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else if (ich7_detected)
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else if ((ich7_detected) || (viaspi_detected))
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return ich_spi_read(flash, buf);
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else if (ich9_detected)
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return ich_spi_read(flash, buf);
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{
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if (it8716f_flashport)
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return it8716f_spi_chip_write(flash, buf);
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else if (ich7_detected)
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else if ((ich7_detected) || (viaspi_detected))
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return ich_spi_write(flash, buf);
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else if (ich9_detected)
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return ich_spi_write(flash, buf);
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