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nb/intel/i945: Deduplicate PCIEXBAR decoding 

We can use `decode_pcie_bar` instead, if we make it non-static.

Change-Id: Ic39f3df0293b4d44f031515b1f868e0bb9f750c9
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44145
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Angel Pons 2020-08-03 16:15:16 +02:00
parent cff4d1649f
commit 4a2f08c846
3 changed files with 7 additions and 32 deletions
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35
src/northbridge/intel/i945/acpi.c
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@ -3,46 +3,19 @@
#include <types.h>
#include <acpi/acpi.h>
#include <acpi/acpigen.h>
#include <commonlib/helpers.h>
#include <device/device.h>
#include <device/pci_ops.h>
#include "i945.h"
unsigned long acpi_fill_mcfg(unsigned long current)
{
struct device *dev;
u32 pciexbar = 0;
u32 pciexbar_reg;
int max_buses;
u32 length, pciexbar;
dev = pcidev_on_root(0, 0);
if (!dev)
if (!decode_pcie_bar(&pciexbar, &length))
return current;
pciexbar_reg = pci_read_config32(dev, PCIEXBAR);
// MMCFG not supported or not enabled.
if (!(pciexbar_reg & (1 << 0)))
return current;
switch ((pciexbar_reg >> 1) & 3) {
case 0: // 256MB
pciexbar = pciexbar_reg & ((1 << 31)|(1 << 30)|(1 << 29)|(1 << 28));
max_buses = 256;
break;
case 1: // 128M
pciexbar = pciexbar_reg & ((1 << 31)|(1 << 30)|(1 << 29)|(1 << 28)|(1 << 27));
max_buses = 128;
break;
case 2: // 64M
pciexbar = pciexbar_reg & ((1 << 31)|(1 << 30)|(1 << 29)|(1 << 28)|(1 << 27)|(1 << 26));
max_buses = 64;
break;
default: // RSVD
return current;
}
if (!pciexbar)
return current;
const int max_buses = length / MiB;
current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *) current,
pciexbar, 0x0, 0x0, max_buses - 1);

2
src/northbridge/intel/i945/i945.h
View File

@ -364,6 +364,8 @@ void sdram_dump_mchbar_registers(void);
u32 decode_igd_memory_size(u32 gms);
u32 decode_tseg_size(const u8 esmramc);
int decode_pcie_bar(u32 *const base, u32 *const len);
/* Romstage mainboard callbacks */
/* Optional: Override the default LPC config. */
void mainboard_lpc_decode(void);

2
src/northbridge/intel/i945/northbridge.c
View File

@ -12,7 +12,7 @@
#include <cpu/intel/smm_reloc.h>
#include "i945.h"
static int decode_pcie_bar(u32 *const base, u32 *const len)
int decode_pcie_bar(u32 *const base, u32 *const len)
{
*base = 0;
*len = 0;