Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-22
Creator: Ronald G. Minnich <rminnich@lanl.gov> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1938 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -44,7 +44,7 @@ arch i386 end
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driver mainboard.o
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if HAVE_PIRQ_TABLE object irq_tables.o end
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#object reset.o
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object reset.o
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##
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## Romcc output
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@ -14,6 +14,9 @@
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#include "cpu/x86/bist.h"
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#include "cpu/amd/sc520/raminit.c"
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struct mem_controller {
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int i;
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};
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static void hard_reset(void)
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{
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@ -36,19 +39,21 @@ static inline void activate_spd_rom(const struct mem_controller *ctrl)
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static inline int spd_read_byte(unsigned device, unsigned address)
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{
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return smbus_read_byte(device, address);
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// return smbus_read_byte(device, address);
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}
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#include "sdram/generic_sdram.c"
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//#include "sdram/generic_sdram.c"
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static void main(unsigned long bist)
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{
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/*
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static const struct mem_controller memctrl[] = {
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{
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.d0 = PCI_DEV(0, 0, 0),
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.channel0 = { (0xa<<3)|0, 0 },
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},
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};
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*/
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if (bist == 0) {
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early_mtrr_init();
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@ -65,7 +70,7 @@ static void main(unsigned long bist)
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#if 0
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print_pci_devices();
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#endif
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#if 0
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if(!bios_reset_detected()) {
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enable_smbus();
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#if 0
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@ -73,12 +78,13 @@ static void main(unsigned long bist)
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// dump_smbus_registers();
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#endif
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memreset_setup();
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sdram_initialize(sizeof(memctrl)/sizeof(memctrl[0]), memctrl);
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}
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#endif
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#if 0
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else {
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/* clear memory 1meg */
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@ -32,10 +32,10 @@ static unsigned pci_read_config32(device_t dev, unsigned where)
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outl(0x80000000 | (addr & ~3), 0xCF8);
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return inl(0xCFC);
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}
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#endif
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void hard_reset(void)
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{
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set_bios_reset();
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//set_bios_reset();
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// pci_write_config8(PCI_DEV(1, 0x04, 0), 0x47, 1);
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}
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#endif
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