RB_C3 and HY-D0 should also apply the workaround for errata 344, according to

Revision Guide for AMD Family10h processors (#41322) rev 3.74 June 2010

My processor wasn't getting the workaround

Signed-off-by: Xavi Drudis Ferran <xdrudis@tinet.cat>
Acked-by: Stefan Reinauer <stepan@coresystems.de>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5734 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Xavi Drudis Ferran 2010-08-22 19:56:47 +00:00 committed by Stefan Reinauer
parent 4793ef1f82
commit 4a43b7d2bb
1 changed files with 2 additions and 2 deletions

View File

@ -321,9 +321,9 @@ static const struct {
u32 mask;
} fam10_htphy_default[] = {
/* Errata 344 - Fam10 C2/D0
/* Errata 344 - Fam10 C2/D0 -- FIXME at 25.6.2010 should be for ((RB|BL|DA)-C[23])|(HY-D[01])|(PH-E0) but I don't find constants for all of them
* System software should set bit 6 of F4x1[9C, 94, 8C, 84]_x[78:70, 68:60]. */
{ 0x60, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
{ 0x60, AMD_DRBH_Cx , AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
0x00000040, 0x00000040 },
{ 0x61, AMD_RB_C2 | AMD_DA_C2 | AMD_DA_C3 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
0x00000040, 0x00000040 },