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mb/google/myst: Add selective FP init 

Add FW_CONFIG item for FP sensor init and conditionally init
the GPIOs based on whether we're using a SPI or UART FP sensor.

BUG=b:276939271
TEST=builds

Change-Id: I9815bd17df1d15f73529beb15d08cde1ef90efad
Signed-off-by: Jon Murphy <jpmurphy@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74958
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
This commit is contained in:
Jon Murphy 2023-05-03 21:13:00 -06:00 committed by Felix Held
parent c20afb801a
commit 4a44f6a6b2
3 changed files with 55 additions and 12 deletions
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1
src/mainboard/google/myst/variants/baseboard/Makefile.inc
View File

@ -1,5 +1,6 @@
bootblock-y += gpio.c
ramstage-$(CONFIG_FW_CONFIG) += fw_config.c
ramstage-y += gpio.c
ramstage-y += tpm_tis.c

42
src/mainboard/google/myst/variants/baseboard/fw_config.c Normal file
View File

@ -0,0 +1,42 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <bootstate.h>
#include <console/console.h>
#include <fw_config.h>
#include <gpio.h>
static const struct soc_amd_gpio fp_spi_gpio_table[] = {
/* SOC_CLK_FPMCU_R */
PAD_NF(GPIO_70, SPI2_CLK, PULL_NONE),
/* SOC_CLK_FPMCU_R_L */
PAD_NF(GPIO_75, SPI2_CS1_L, PULL_NONE),
/* SPI_SOC_DO_FPMCU_DI_R */
PAD_NF(GPIO_104, SPI2_DAT0, PULL_NONE),
/* SPI_SOC_DI_FPMCU_DO_R */
PAD_NF(GPIO_105, SPI2_DAT1, PULL_NONE),
};
static const struct soc_amd_gpio fp_uart_gpio_table[] = {
/* UART1_TXD / FPMCU */
PAD_NF(GPIO_140, UART1_TXD, PULL_NONE),
/* UART1_RXD / FPMCU */
PAD_NF(GPIO_142, UART1_RXD, PULL_NONE),
};
static void fw_config_handle(void *unused)
{
if (!fw_config_is_provisioned() || fw_config_probe(FW_CONFIG(FP, DISABLED))) {
return;
}
if (fw_config_probe(FW_CONFIG(FP, SPI))) {
printk(BIOS_INFO, "Enabling SPI FP.\n");
gpio_configure_pads(fp_spi_gpio_table, ARRAY_SIZE(fp_spi_gpio_table));
} else if (fw_config_probe(FW_CONFIG(FP, UART))) {
printk(BIOS_INFO, "Enabling UART FP.\n");
gpio_configure_pads(fp_uart_gpio_table, ARRAY_SIZE(fp_uart_gpio_table));
} else {
printk(BIOS_INFO, "Invalid Fingerprint Setting, leaving FP disabled.");
}
}
BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, fw_config_handle, NULL);

24
src/mainboard/google/myst/variants/baseboard/gpio.c
View File

@ -76,12 +76,12 @@ static const struct soc_amd_gpio base_gpio_table[] = {
PAD_NF(GPIO_68, SPI1_DAT2, PULL_NONE),
/* ESPI1_DATA3 */
PAD_NF(GPIO_69, SPI1_DAT3, PULL_NONE),
/* SOC_CLK_FPMCU_R TODO(276939271): Selectively init */
PAD_NF(GPIO_70, SPI2_CLK, PULL_NONE),
/* SOC_CLK_FPMCU_R if SPI FP populated */
PAD_NC(GPIO_70),
/* EN_TCHSCR_REPORT */
PAD_GPO(GPIO_74, LOW),
/* SOC_CLK_FPMCU_R_L TODO(276939271): Selectively init */
PAD_NF(GPIO_75, SPI2_CS1_L, PULL_NONE),
/* SOC_CLK_FPMCU_R_L if SPI FP populated */
PAD_NC(GPIO_75),
/* Unused */
PAD_NC(GPIO_76),
/* ESPI_SOC_CLK_EC_R */
@ -106,10 +106,10 @@ static const struct soc_amd_gpio base_gpio_table[] = {
PAD_GPI(GPIO_91, PULL_NONE),
/* CLK_REQ0_L / WLAN */
PAD_NF(GPIO_92, CLK_REQ0_L, PULL_NONE),
/* SPI_SOC_DO_FPMCU_DI_R TODO(276939271): Selectively init */
PAD_NF(GPIO_104, SPI2_DAT0, PULL_NONE),
/* SPI_SOC_DI_FPMCU_DO_R TODO(276939271): Selectively init */
PAD_NF(GPIO_105, SPI2_DAT1, PULL_NONE),
/* SPI_SOC_DO_FPMCU_DI_R if SPI FP populated */
PAD_NC(GPIO_104),
/* SPI_SOC_DI_FPMCU_DO_R if SPI FP populated */
PAD_NC(GPIO_105),
/* RAM_ID_2 */
PAD_GPI(GPIO_106, PULL_NONE),
/* RAM_ID_3 */
@ -138,12 +138,12 @@ static const struct soc_amd_gpio base_gpio_table[] = {
PAD_NC(GPIO_138),
/* SOC_BIOS_WP_OD */
PAD_GPI(GPIO_139, PULL_NONE),
/* UART1_TXD / FPMCU TODO(276939271): Selectively init */
PAD_NF(GPIO_140, UART1_TXD, PULL_NONE),
/* UART1_TXD if UART FP populated */
PAD_NC(GPIO_140),
/* UART0_RXD / DBG */
PAD_NF(GPIO_141, UART0_RXD, PULL_NONE),
/* UART1_RXD / FPMCU TODO(276939271): Selectively init */
PAD_NF(GPIO_142, UART1_RXD, PULL_NONE),
/* UART1_RXD if UART FP populated */
PAD_NC(GPIO_142),
/* UART0_TXD / DBG */
PAD_NF(GPIO_143, UART0_TXD, PULL_NONE),
/* EN_PP3300_TCHSCR */