mb/google/octopus: Create bip variant

This creates a bip variant for octopus. Nothing is set in the variant
files here-- everything is picked up from baseboard.

BUG=b:75976864
TEST=None

Change-Id: I7a8ac3d8bb71416f05ef1a605684d92d5902abda
Signed-off-by: Justin TerAvest <teravest@chromium.org>
Reviewed-on: https://review.coreboot.org/25285
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Justin TerAvest 2018-03-19 16:32:28 -06:00 committed by Martin Roth
parent d0bc79be47
commit 4a664fa61b
5 changed files with 65 additions and 0 deletions

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@ -39,6 +39,7 @@ config MAINBOARD_DIR
config VARIANT_DIR
string
default "yorp" if BOARD_GOOGLE_YORP
default "bip" if BOARD_GOOGLE_BIP
default "octopus" if BOARD_GOOGLE_OCTOPUS
config DEVICETREE
@ -48,6 +49,7 @@ config DEVICETREE
config MAINBOARD_PART_NUMBER
string
default "yorp" if BOARD_GOOGLE_YORP
default "bip" if BOARD_GOOGLE_BIP
default "octopus" if BOARD_GOOGLE_OCTOPUS
config MAINBOARD_FAMILY
@ -58,6 +60,7 @@ config GBB_HWID
string
depends on CHROMEOS
default "YORP TEST 7755" if BOARD_GOOGLE_YORP
default "BIP TEST 5732" if BOARD_GOOGLE_BIP
default "OCTOPUS TEST 6859" if BOARD_GOOGLE_OCTOPUS
config MAX_CPUS

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@ -6,3 +6,7 @@ config BOARD_GOOGLE_YORP
bool "Yorp"
select BOARD_GOOGLE_BASEBOARD_OCTOPUS
select BASEBOARD_OCTOPUS_LAPTOP
config BOARD_GOOGLE_BIP
bool "Bip"
select BOARD_GOOGLE_BASEBOARD_OCTOPUS
select BASEBOARD_OCTOPUS_LAPTOP

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@ -0,0 +1,16 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2018 Google LLC
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <baseboard/acpi/dptf.asl>

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@ -0,0 +1,21 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2018 Google LLC
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef MAINBOARD_EC_H
#define MAINBOARD_EC_H
#include <baseboard/ec.h>
#endif

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@ -0,0 +1,21 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2018 Google LLC
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
* GNU General Public License for more details.
*/
#ifndef MAINBOARD_GPIO_H
#define MAINBOARD_GPIO_H
#include <baseboard/gpio.h>
#endif /* MAINBOARD_GPIO_H */