soc/amd: introduce common SMU S3/4/5 entry message code
The smu_sx_entry function is identical for all AMD SoCs, so introduce it as common code that can be selected to be included in the build via the SOC_AMD_COMMON_BLOCK_SMU_SX_ENTRY Kconfig option. The only SoC-specific difference in this function is the ID of the SMC_MSG_S3ENTRY message which is defined in each SoC's soc/smu.h include file. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Suggested-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: I49758e9333a351d8e50e8f1b53a7f00fbe89866c Reviewed-on: https://review.coreboot.org/c/coreboot/+/71875 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
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@ -3,3 +3,10 @@ config SOC_AMD_COMMON_BLOCK_SMU
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select SOC_AMD_COMMON_BLOCK_SMN
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help
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Select this option to add functions to communicate with the SMU to the build.
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config SOC_AMD_COMMON_BLOCK_SMU_SX_ENTRY
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bool
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depends on SOC_AMD_COMMON_BLOCK_SMU
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help
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Select this option to add the function to send the S3/4/5 entry
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message to the SMU.
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@ -3,3 +3,5 @@ smm-$(CONFIG_SOC_AMD_COMMON_BLOCK_SMU) += smu.c
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bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_SMU) += smu.c
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romstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_SMU) += smu.c
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ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_SMU) += smu.c
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smm-$(CONFIG_SOC_AMD_COMMON_BLOCK_SMU_SX_ENTRY) += smu_sx_entry.c
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@ -0,0 +1,17 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <console/console.h>
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#include <amdblocks/smu.h>
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#include <soc/smu.h>
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/*
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* Request the SMU to put system into S3, S4, or S5. On entry, SlpTyp determines S-State and
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* SlpTypeEn gets set by the SMU. Function does not return if successful.
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*/
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void smu_sx_entry(void)
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{
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struct smu_payload msg = { 0 }; /* Unused for SMC_MSG_S3ENTRY */
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printk(BIOS_DEBUG, "SMU: Put system into S3/S4/S5\n");
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send_smu_message(SMC_MSG_S3ENTRY, &msg);
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}
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