google/link: fix detection of dimm on channel 1
Changes to the sandybridge memory init code (both MRC and native) now require SPD data on all populated channels in order for dimms to be detected properly, so copy spd_data[0] to spd_data[2], as LINK always has 2 channels of memory down. Test: boot google/link, observe onboard RAM correctly detected on both channels Change-Id: Id01d57d5e5f928dfc1cd9063ab1625c440ef2bbe Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35084 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
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@ -156,8 +156,12 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
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},
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},
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};
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};
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*pei_data = pei_data_template;
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*pei_data = pei_data_template;
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/* LINK has 2 channels of memory down, so spd_data[0] and [2]
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both need to be populated */
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memcpy(pei_data->spd_data[0], locate_spd(),
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memcpy(pei_data->spd_data[0], locate_spd(),
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sizeof(pei_data->spd_data[0]));
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sizeof(pei_data->spd_data[0]));
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memcpy(pei_data->spd_data[2], pei_data->spd_data[0],
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sizeof(pei_data->spd_data[0]));
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}
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}
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const struct southbridge_usb_port mainboard_usb_ports[] = {
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const struct southbridge_usb_port mainboard_usb_ports[] = {
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@ -180,7 +184,10 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
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void mainboard_get_spd(spd_raw_data *spd, bool id_only)
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void mainboard_get_spd(spd_raw_data *spd, bool id_only)
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{
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{
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/* LINK has 2 channels of memory down, so spd_data[0] and [2]
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both need to be populated */
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memcpy(&spd[0], locate_spd(), 128);
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memcpy(&spd[0], locate_spd(), 128);
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memcpy(&spd[2], &spd[0], 128);
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}
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}
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void mainboard_early_init(int s3resume)
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void mainboard_early_init(int s3resume)
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