Changes to make flashrom compile (and work) on FreeBSD.
This patch addresses different argument order of outX() calls, FreeBSD-specific headers, difference in certain type names and system interface names, and also FreeBSD-specific way of gaining IO port access. Signed-off-by: Andriy Gapon <avg@icyb.net.ua> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3344 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Andriy Gapon
Carl-Daniel Hailfinger
parent
42319797a6
commit
4b1cde877c
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@ -19,6 +19,10 @@ else
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LDFLAGS = -lpci -lz
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STRIP_ARGS = -s
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endif
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ifeq ($(OS_ARCH), FreeBSD)
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CFLAGS += -I/usr/local/include
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LDFLAGS += -L/usr/local/lib
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endif
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OBJS = chipset_enable.o board_enable.o udelay.o jedec.o stm50flw0x0x.c \
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sst28sf040.o am29f040b.o mx29f002.o sst39sf020.o m29f400bt.o \
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@ -37,36 +37,36 @@
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/* Enter extended functions */
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static void w836xx_ext_enter(uint16_t port)
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{
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outb(0x87, port);
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outb(0x87, port);
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OUTB(0x87, port);
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OUTB(0x87, port);
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}
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/* Leave extended functions */
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static void w836xx_ext_leave(uint16_t port)
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{
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outb(0xAA, port);
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OUTB(0xAA, port);
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}
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/* General functions for reading/writing Winbond Super I/Os. */
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static unsigned char wbsio_read(uint16_t index, uint8_t reg)
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{
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outb(reg, index);
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return inb(index + 1);
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OUTB(reg, index);
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return INB(index + 1);
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}
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static void wbsio_write(uint16_t index, uint8_t reg, uint8_t data)
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{
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outb(reg, index);
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outb(data, index + 1);
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OUTB(reg, index);
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OUTB(data, index + 1);
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}
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static void wbsio_mask(uint16_t index, uint8_t reg, uint8_t data, uint8_t mask)
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{
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uint8_t tmp;
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outb(reg, index);
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tmp = inb(index + 1) & ~mask;
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outb(tmp | (data & mask), index + 1);
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OUTB(reg, index);
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tmp = INB(index + 1) & ~mask;
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OUTB(tmp | (data & mask), index + 1);
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}
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/**
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@ -172,9 +172,9 @@ static int board_via_epia_m(const char *name)
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base = pci_read_word(dev, 0x88) & 0xFF80;
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/* Enable GPIO15 which is connected to write protect. */
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val = inb(base + 0x4D);
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val = INB(base + 0x4D);
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val |= 0x80;
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outb(val, base + 0x4D);
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OUTB(val, base + 0x4D);
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return 0;
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}
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@ -249,14 +249,14 @@ static int board_asus_p5a(const char *name)
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#define ASUSP5A_LOOP 5000
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outb(0x00, 0xE807);
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outb(0xEF, 0xE803);
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OUTB(0x00, 0xE807);
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OUTB(0xEF, 0xE803);
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outb(0xFF, 0xE800);
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OUTB(0xFF, 0xE800);
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for (i = 0; i < ASUSP5A_LOOP; i++) {
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outb(0xE1, 0xFF);
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if (inb(0xE800) & 0x04)
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OUTB(0xE1, 0xFF);
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if (INB(0xE800) & 0x04)
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break;
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}
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@ -265,13 +265,13 @@ static int board_asus_p5a(const char *name)
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return -1;
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}
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outb(0x20, 0xE801);
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outb(0x20, 0xE1);
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OUTB(0x20, 0xE801);
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OUTB(0x20, 0xE1);
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outb(0xFF, 0xE802);
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OUTB(0xFF, 0xE802);
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for (i = 0; i < ASUSP5A_LOOP; i++) {
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tmp = inb(0xE800);
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tmp = INB(0xE800);
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if (tmp & 0x70)
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break;
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}
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@ -281,24 +281,24 @@ static int board_asus_p5a(const char *name)
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return -1;
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}
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tmp = inb(0xE804);
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tmp = INB(0xE804);
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tmp &= ~0x02;
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outb(0x00, 0xE807);
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outb(0xEE, 0xE803);
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OUTB(0x00, 0xE807);
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OUTB(0xEE, 0xE803);
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outb(tmp, 0xE804);
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OUTB(tmp, 0xE804);
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outb(0xFF, 0xE800);
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outb(0xE1, 0xFF);
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OUTB(0xFF, 0xE800);
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OUTB(0xE1, 0xFF);
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outb(0x20, 0xE801);
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outb(0x20, 0xE1);
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OUTB(0x20, 0xE801);
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OUTB(0x20, 0xE1);
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outb(0xFF, 0xE802);
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OUTB(0xFF, 0xE802);
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for (i = 0; i < ASUSP5A_LOOP; i++) {
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tmp = inb(0xE800);
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tmp = INB(0xE800);
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if (tmp & 0x70)
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break;
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}
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@ -316,9 +316,9 @@ static int board_ibm_x3455(const char *name)
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uint8_t byte;
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/* Set GPIO lines in the Broadcom HT-1000 southbridge. */
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outb(0x45, 0xcd6);
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byte = inb(0xcd7);
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outb(byte | 0x20, 0xcd7);
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OUTB(0x45, 0xcd6);
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byte = INB(0xcd7);
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OUTB(byte | 0x20, 0xcd7);
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return 0;
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}
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@ -331,13 +331,13 @@ static int board_epox_ep_bx3(const char *name)
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uint8_t tmp;
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/* Raise GPIO22. */
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tmp = inb(0x4036);
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outb(tmp, 0xEB);
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tmp = INB(0x4036);
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OUTB(tmp, 0xEB);
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tmp |= 0x40;
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outb(tmp, 0x4036);
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outb(tmp, 0xEB);
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OUTB(tmp, 0x4036);
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OUTB(tmp, 0xEB);
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return 0;
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}
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@ -360,10 +360,10 @@ static int board_acorp_6a815epd(const char *name)
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/* Use GPIOBASE register to find where the GPIO is mapped. */
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port = (pci_read_word(dev, 0x58) & 0xFFC0) + 0xE;
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val = inb(port);
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val = INB(port);
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val |= 0x80; /* Top Block Lock -- pin 8 of PLCC32 */
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val |= 0x40; /* Lower Blocks Lock -- pin 7 of PLCC32 */
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outb(val, port);
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OUTB(val, port);
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return 0;
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}
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@ -449,7 +449,7 @@ static int board_kontron_986lcd_m(const char *name)
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/* Use GPIOBASE register to find where the GPIO is mapped. */
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gpiobar = pci_read_word(dev, 0x48) & 0xfffc;
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val = inl(gpiobar + ICH7_GPIO_LVL2); /* GP_LVL2 */
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val = INL(gpiobar + ICH7_GPIO_LVL2); /* GP_LVL2 */
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printf_debug("\nGPIOBAR=0x%04x GP_LVL: 0x%08x\n", gpiobar, val);
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/* bit 2 (0x04) = 0 #TBL --> bootblock locking = 1
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@ -462,7 +462,7 @@ static int board_kontron_986lcd_m(const char *name)
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*/
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val |= (1 << 2) | (1 << 3);
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outl(val, gpiobar + ICH7_GPIO_LVL2);
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OUTL(val, gpiobar + ICH7_GPIO_LVL2);
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return 0;
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}
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@ -65,37 +65,37 @@ static int enable_flash_sis630(struct pci_dev *dev, const char *name)
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/* The same thing on SiS 950 Super I/O side... */
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/* First probe for Super I/O on config port 0x2e. */
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outb(0x87, 0x2e);
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outb(0x01, 0x2e);
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outb(0x55, 0x2e);
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outb(0x55, 0x2e);
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OUTB(0x87, 0x2e);
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OUTB(0x01, 0x2e);
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OUTB(0x55, 0x2e);
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OUTB(0x55, 0x2e);
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if (inb(0x2f) != 0x87) {
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if (INB(0x2f) != 0x87) {
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/* If that failed, try config port 0x4e. */
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outb(0x87, 0x4e);
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outb(0x01, 0x4e);
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outb(0x55, 0x4e);
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outb(0xaa, 0x4e);
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if (inb(0x4f) != 0x87) {
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OUTB(0x87, 0x4e);
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OUTB(0x01, 0x4e);
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OUTB(0x55, 0x4e);
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OUTB(0xaa, 0x4e);
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if (INB(0x4f) != 0x87) {
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printf("Can not access SiS 950\n");
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return -1;
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}
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outb(0x24, 0x4e);
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b = inb(0x4f) | 0xfc;
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outb(0x24, 0x4e);
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outb(b, 0x4f);
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outb(0x02, 0x4e);
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outb(0x02, 0x4f);
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OUTB(0x24, 0x4e);
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b = INB(0x4f) | 0xfc;
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OUTB(0x24, 0x4e);
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OUTB(b, 0x4f);
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OUTB(0x02, 0x4e);
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OUTB(0x02, 0x4f);
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}
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outb(0x24, 0x2e);
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printf("2f is %#x\n", inb(0x2f));
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b = inb(0x2f) | 0xfc;
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outb(0x24, 0x2e);
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outb(b, 0x2f);
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OUTB(0x24, 0x2e);
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printf("2f is %#x\n", INB(0x2f));
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b = INB(0x2f) | 0xfc;
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OUTB(0x24, 0x2e);
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OUTB(b, 0x2f);
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outb(0x02, 0x2e);
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outb(0x02, 0x2f);
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OUTB(0x02, 0x2e);
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OUTB(0x02, 0x2f);
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return 0;
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}
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@ -522,13 +522,13 @@ static int enable_flash_sb400(struct pci_dev *dev, const char *name)
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pci_write_byte(dev, 0x48, tmp);
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/* Now become a bit silly. */
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tmp = inb(0xc6f);
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outb(tmp, 0xeb);
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outb(tmp, 0xeb);
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tmp = INB(0xc6f);
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OUTB(tmp, 0xeb);
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OUTB(tmp, 0xeb);
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tmp |= 0x40;
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outb(tmp, 0xc6f);
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outb(tmp, 0xeb);
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outb(tmp, 0xeb);
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OUTB(tmp, 0xc6f);
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OUTB(tmp, 0xeb);
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OUTB(tmp, 0xeb);
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return 0;
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}
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@ -30,6 +30,25 @@
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#include <stdint.h>
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#include <stdio.h>
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#ifdef __FreeBSD__
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#include <machine/cpufunc.h>
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#define off64_t off_t
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#define lseek64 lseek
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#define OUTB(x, y) do { u_int tmp = (y); outb(tmp, (x)); } while (0)
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#define OUTW(x, y) do { u_int tmp = (y); outw(tmp, (x)); } while (0)
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#define OUTL(x, y) do { u_int tmp = (y); outl(tmp, (x)); } while (0)
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#define INB(x) __extension__ ({ u_int tmp = (x); inb(tmp); })
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#define INW(x) __extension__ ({ u_int tmp = (x); inw(tmp); })
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#define INL(x) __extension__ ({ u_int tmp = (x); inl(tmp); })
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#else
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#define OUTB outb
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#define OUTW outw
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#define OUTL outl
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#define INB inb
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#define INW inw
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#define INL inl
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#endif
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#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
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struct flashchip {
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@ -252,6 +252,9 @@ int main(int argc, char *argv[])
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int option_index = 0;
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int read_it = 0, write_it = 0, erase_it = 0, verify_it = 0;
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int ret = 0, i;
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#ifdef __FreeBSD__
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int io_fd;
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#endif
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static struct option long_options[] = {
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{"read", 0, 0, 'r'},
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@ -367,6 +370,8 @@ int main(int argc, char *argv[])
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/* First get full io access */
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#if defined (__sun) && (defined(__i386) || defined(__amd64))
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if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) {
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#elif defined(__FreeBSD__)
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if ((io_fd = open("/dev/io", O_RDWR)) < 0) {
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#else
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if (iopl(3) != 0) {
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#endif
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@ -559,5 +564,8 @@ int main(int argc, char *argv[])
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if (verify_it)
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ret |= verify_flash(flash, buf);
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#ifdef __FreeBSD__
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close(io_fd);
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#endif
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return ret;
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}
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@ -40,14 +40,14 @@ int fast_spi = 1;
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/* Generic Super I/O helper functions */
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uint8_t regval(uint16_t port, uint8_t reg)
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{
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outb(reg, port);
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return inb(port + 1);
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OUTB(reg, port);
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return INB(port + 1);
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}
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void regwrite(uint16_t port, uint8_t reg, uint8_t val)
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{
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outb(reg, port);
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outb(val, port + 1);
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OUTB(reg, port);
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OUTB(val, port + 1);
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}
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/* Helper functions for most recent ITE IT87xx Super I/O chips */
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@ -55,13 +55,13 @@ void regwrite(uint16_t port, uint8_t reg, uint8_t val)
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#define CHIP_ID_BYTE2_REG 0x21
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static void enter_conf_mode_ite(uint16_t port)
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{
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outb(0x87, port);
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outb(0x01, port);
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outb(0x55, port);
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OUTB(0x87, port);
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OUTB(0x01, port);
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OUTB(0x55, port);
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if (port == ITE_SUPERIO_PORT1)
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outb(0x55, port);
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OUTB(0x55, port);
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else
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outb(0xaa, port);
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OUTB(0xaa, port);
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}
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static void exit_conf_mode_ite(uint16_t port)
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@ -129,7 +129,7 @@ int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt, const unsig
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int i;
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do {
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busy = inb(it8716f_flashport) & 0x80;
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busy = INB(it8716f_flashport) & 0x80;
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} while (busy);
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if (readcnt > 3) {
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printf("%s called with unsupported readcnt %i.\n",
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@ -138,27 +138,27 @@ int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt, const unsig
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}
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switch (writecnt) {
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case 1:
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outb(writearr[0], it8716f_flashport + 1);
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OUTB(writearr[0], it8716f_flashport + 1);
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writeenc = 0x0;
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break;
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case 2:
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outb(writearr[0], it8716f_flashport + 1);
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outb(writearr[1], it8716f_flashport + 7);
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OUTB(writearr[0], it8716f_flashport + 1);
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OUTB(writearr[1], it8716f_flashport + 7);
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writeenc = 0x1;
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break;
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case 4:
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outb(writearr[0], it8716f_flashport + 1);
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outb(writearr[1], it8716f_flashport + 4);
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outb(writearr[2], it8716f_flashport + 3);
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outb(writearr[3], it8716f_flashport + 2);
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OUTB(writearr[0], it8716f_flashport + 1);
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OUTB(writearr[1], it8716f_flashport + 4);
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OUTB(writearr[2], it8716f_flashport + 3);
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OUTB(writearr[3], it8716f_flashport + 2);
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writeenc = 0x2;
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break;
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case 5:
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outb(writearr[0], it8716f_flashport + 1);
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outb(writearr[1], it8716f_flashport + 4);
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outb(writearr[2], it8716f_flashport + 3);
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outb(writearr[3], it8716f_flashport + 2);
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outb(writearr[4], it8716f_flashport + 7);
|
||||
OUTB(writearr[0], it8716f_flashport + 1);
|
||||
OUTB(writearr[1], it8716f_flashport + 4);
|
||||
OUTB(writearr[2], it8716f_flashport + 3);
|
||||
OUTB(writearr[3], it8716f_flashport + 2);
|
||||
OUTB(writearr[4], it8716f_flashport + 7);
|
||||
writeenc = 0x3;
|
||||
break;
|
||||
default:
|
||||
|
|
@ -170,15 +170,15 @@ int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt, const unsig
|
|||
* Note:
|
||||
* We can't use writecnt directly, but have to use a strange encoding.
|
||||
*/
|
||||
outb(((0x4 + (fast_spi ? 1 : 0)) << 4) | ((readcnt & 0x3) << 2) | (writeenc), it8716f_flashport);
|
||||
OUTB(((0x4 + (fast_spi ? 1 : 0)) << 4) | ((readcnt & 0x3) << 2) | (writeenc), it8716f_flashport);
|
||||
|
||||
if (readcnt > 0) {
|
||||
do {
|
||||
busy = inb(it8716f_flashport) & 0x80;
|
||||
busy = INB(it8716f_flashport) & 0x80;
|
||||
} while (busy);
|
||||
|
||||
for (i = 0; i < readcnt; i++) {
|
||||
readarr[i] = inb(it8716f_flashport + 5 + i);
|
||||
readarr[i] = INB(it8716f_flashport + 5 + i);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -190,12 +190,12 @@ void it8716f_spi_page_program(int block, uint8_t *buf, uint8_t *bios) {
|
|||
int i;
|
||||
|
||||
spi_write_enable();
|
||||
outb(0x06 , it8716f_flashport + 1);
|
||||
outb(((2 + (fast_spi ? 1 : 0)) << 4), it8716f_flashport);
|
||||
OUTB(0x06 , it8716f_flashport + 1);
|
||||
OUTB(((2 + (fast_spi ? 1 : 0)) << 4), it8716f_flashport);
|
||||
for (i = 0; i < 256; i++) {
|
||||
bios[256 * block + i] = buf[256 * block + i];
|
||||
}
|
||||
outb(0, it8716f_flashport);
|
||||
OUTB(0, it8716f_flashport);
|
||||
/* Wait until the Write-In-Progress bit is cleared.
|
||||
* This usually takes 1-10 ms, so wait in 1 ms steps.
|
||||
*/
|
||||
|
|
@ -221,7 +221,7 @@ int it8716f_over512k_spi_chip_write(struct flashchip *flash, uint8_t *buf)
|
|||
myusec_delay(10);
|
||||
}
|
||||
/* resume normal ops... */
|
||||
outb(0x20, it8716f_flashport);
|
||||
OUTB(0x20, it8716f_flashport);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue