soc/intel/cmn/cse: Drop redundant macro check for heci1_disable()
This patch removes redundant DISABLE_HECI1_AT_PRE_BOOT config check for heci1_disable(), once by caller (from various SoC) and again inside the callee (heci1_disable) function. As all callers of heci1_disable() function are doing DISABLE_HECI1_AT_PRE_BOOT config enabled check, hence, the second check inside the callee can be dropped. BUG=b:228789015 TEST=Able to build and boot google/redrix with this change. CSE PCI device is getting function disabled upon selecting DISABLE_HECI1_AT_PRE_BOOT from SoC config. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I47d7a9989e355987618d089f79c3340fcf4953ad Reviewed-on: https://review.coreboot.org/c/coreboot/+/63821 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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@ -83,9 +83,6 @@ static void heci1_disable_using_sbi(void)
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void heci1_disable(void)
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void heci1_disable(void)
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{
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{
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if (!CONFIG(DISABLE_HECI1_AT_PRE_BOOT))
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return;
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if (ENV_SMM && CONFIG(SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_SBI)) {
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if (ENV_SMM && CONFIG(SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_SBI)) {
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printk(BIOS_INFO, "Disabling Heci using SBI in SMM mode\n");
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printk(BIOS_INFO, "Disabling Heci using SBI in SMM mode\n");
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return heci1_disable_using_sbi();
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return heci1_disable_using_sbi();
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