sb/intel: Factor out soc_fill_gnvs()
Name the common part of GNVS initialisation as soc_fill_gnvs(). It is also moved before the call to acpi_create_gnvs(), which followup will rename to mainbord_fill_gnvs() to reflect that implementation is under mb/. Change-Id: Ic4cf1548b65a86212d6e45d460fcd23bb8036365 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48706 Reviewed-by: Lance Zhao Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -35,6 +35,8 @@ __weak uint32_t *gnvs_cbmc_ptr(struct global_nvs *gnvs_)
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return NULL;
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}
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__weak void soc_fill_gnvs(struct global_nvs *gnvs_) { }
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void *gnvs_get_or_create(void)
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{
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size_t gnvs_size;
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@ -34,4 +34,6 @@ void southbridge_inject_dsdt(const struct device *device);
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void acpi_create_gnvs(struct global_nvs *gnvs);
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void acpi_init_gnvs(struct global_nvs *gnvs);
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void soc_fill_gnvs(struct global_nvs *gnvs);
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#endif
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@ -600,18 +600,22 @@ static void pch_lpc_read_resources(struct device *dev)
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pch_lpc_add_io_resources(dev);
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}
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void soc_fill_gnvs(struct global_nvs *gnvs)
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{
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/* Set unknown wake source */
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gnvs->pm1i = -1;
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/* CPU core count */
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gnvs->pcnt = dev_count_cpu();
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}
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static void southcluster_inject_dsdt(const struct device *device)
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{
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struct global_nvs *gnvs = acpi_get_gnvs();
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if (!gnvs)
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return;
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/* Set unknown wake source */
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gnvs->pm1i = -1;
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/* CPU core count */
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gnvs->pcnt = dev_count_cpu();
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soc_fill_gnvs(gnvs);
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acpi_create_gnvs(gnvs);
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acpi_inject_nvsa();
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}
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@ -15,7 +15,6 @@
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#include <acpi/acpi_gnvs.h>
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#include <acpi/acpigen.h>
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#include <cpu/x86/smm.h>
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#include <cbmem.h>
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#include <string.h>
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#include "chip.h"
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#include "pch.h"
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@ -652,23 +651,23 @@ void *gnvs_chromeos_ptr(struct global_nvs *gnvs)
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return &gnvs->chromeos;
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}
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void southbridge_inject_dsdt(const struct device *dev)
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void soc_fill_gnvs(struct global_nvs *gnvs)
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{
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struct global_nvs *gnvs = acpi_get_gnvs();
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if (gnvs) {
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acpi_create_gnvs(gnvs);
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gnvs->apic = 1;
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gnvs->mpen = 1; /* Enable Multi Processing */
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gnvs->pcnt = dev_count_cpu();
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/* Add it to DSDT. */
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acpigen_write_scope("\\");
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acpigen_write_name_dword("NVSA", (u32) gnvs);
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acpigen_pop_len();
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}
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void southbridge_inject_dsdt(const struct device *dev)
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{
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struct global_nvs *gnvs = acpi_get_gnvs();
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if (!gnvs)
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return;
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soc_fill_gnvs(gnvs);
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acpi_create_gnvs(gnvs);
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acpi_inject_nvsa();
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}
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static const char *lpc_acpi_name(const struct device *dev)
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@ -16,7 +16,6 @@
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#include <cpu/x86/smm.h>
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#include <acpi/acpigen.h>
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#include <arch/smp/mpspec.h>
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#include <cbmem.h>
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#include <string.h>
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#include <southbridge/intel/common/acpi_pirq_gen.h>
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#include <southbridge/intel/common/pmbase.h>
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@ -484,23 +483,21 @@ size_t gnvs_size_of_array(void)
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return sizeof(struct global_nvs);
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}
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void soc_fill_gnvs(struct global_nvs *gnvs)
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{
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gnvs->apic = 1;
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gnvs->mpen = 1; /* Enable Multi Processing */
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}
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void southbridge_inject_dsdt(const struct device *dev)
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{
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struct global_nvs *gnvs = acpi_get_gnvs();
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if (!gnvs)
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return;
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if (gnvs) {
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gnvs->apic = 1;
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gnvs->mpen = 1; /* Enable Multi Processing */
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soc_fill_gnvs(gnvs);
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acpi_create_gnvs(gnvs);
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/* Add it to SSDT. */
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acpigen_write_scope("\\");
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acpigen_write_name_dword("NVSA", (u32) gnvs);
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acpigen_pop_len();
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}
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acpi_inject_nvsa();
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}
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static const char *lpc_acpi_name(const struct device *dev)
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@ -16,7 +16,6 @@
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#include <acpi/acpi_gnvs.h>
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#include <elog.h>
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#include <acpi/acpigen.h>
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#include <cbmem.h>
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#include <string.h>
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#include <cpu/x86/smm.h>
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#include "chip.h"
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@ -547,24 +546,23 @@ size_t gnvs_size_of_array(void)
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return sizeof(struct global_nvs);
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}
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void southbridge_inject_dsdt(const struct device *dev)
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void soc_fill_gnvs(struct global_nvs *gnvs)
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{
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struct global_nvs *gnvs = acpi_get_gnvs();
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if (gnvs) {
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acpi_create_gnvs(gnvs);
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gnvs->apic = 1;
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gnvs->mpen = 1; /* Enable Multi Processing */
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gnvs->pcnt = dev_count_cpu();
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/* Add it to SSDT. */
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acpigen_write_scope("\\");
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acpigen_write_name_dword("NVSA", (uintptr_t)gnvs);
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acpigen_pop_len();
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}
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void southbridge_inject_dsdt(const struct device *dev)
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{
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struct global_nvs *gnvs = acpi_get_gnvs();
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if (!gnvs)
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return;
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soc_fill_gnvs(gnvs);
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acpi_create_gnvs(gnvs);
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acpi_inject_nvsa();
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}
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static const char *lpc_acpi_name(const struct device *dev)
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@ -694,18 +694,22 @@ void *gnvs_chromeos_ptr(struct global_nvs *gnvs)
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return &gnvs->chromeos;
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}
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void soc_fill_gnvs(struct global_nvs *gnvs)
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{
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gnvs->apic = 1;
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gnvs->mpen = 1; /* Enable Multi Processing */
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gnvs->pcnt = dev_count_cpu();
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}
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void southbridge_inject_dsdt(const struct device *dev)
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{
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struct global_nvs *gnvs = acpi_get_gnvs();
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if (!gnvs)
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return;
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soc_fill_gnvs(gnvs);
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acpi_create_gnvs(gnvs);
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gnvs->apic = 1;
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gnvs->mpen = 1; /* Enable Multi Processing */
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gnvs->pcnt = dev_count_cpu();
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acpi_inject_nvsa();
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}
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