soc/amd/picasso/acpi: don't announce unimplemented duty cycle control
Picasso neither has the corresponding P_CNT register implemented nor writes a _PTC ACPI object that would specify the P_CNT register. The Picasso UEFI reference code also sets the duty_width FADT entry to 0. This also aligns the Picasso code with the Cezanne code in this regard. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I74645e5c4e54a2ad6bc7f9e72f5f656027a79860 Reviewed-on: https://review.coreboot.org/c/coreboot/+/73420 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
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@ -86,8 +86,8 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
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overridden by the _CST packages in the processor devices. */
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overridden by the _CST packages in the processor devices. */
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fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED;
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fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED;
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fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED;
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fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED;
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fadt->duty_offset = 1; /* CLK_VAL bits 3:1 */
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fadt->duty_offset = 0; /* Not supported */
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fadt->duty_width = 3; /* CLK_VAL bits 3:1 */
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fadt->duty_width = 0; /* Not supported */
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fadt->day_alrm = RTC_DATE_ALARM;
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fadt->day_alrm = RTC_DATE_ALARM;
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fadt->iapc_boot_arch = cfg->fadt_boot_arch; /* legacy free default */
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fadt->iapc_boot_arch = cfg->fadt_boot_arch; /* legacy free default */
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fadt->flags |= ACPI_FADT_WBINVD | /* See table 5-34 ACPI 6.3 spec */
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fadt->flags |= ACPI_FADT_WBINVD | /* See table 5-34 ACPI 6.3 spec */
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