Allow building images with different prefixes (ie. normal/romstage,
helloWorld/romstage, ...). It defaults to fallback/, so there's no user visible change now. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5102 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -39,6 +39,13 @@ config LOCALVERSION
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the coreboot version number, so that you can easily distinguish
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the coreboot version number, so that you can easily distinguish
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boot logs of different boards from each other.
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boot logs of different boards from each other.
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config CBFS_PREFIX
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string "CBFS prefix to use"
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default "fallback"
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help
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Select the prefix to all files put into the image. It's "fallback"
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by default, "normal" is a common alternative.
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endmenu
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endmenu
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source src/mainboard/Kconfig
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source src/mainboard/Kconfig
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@ -15,14 +15,14 @@ $(obj)/coreboot.rom: $(obj)/coreboot.pre $(obj)/coreboot_ram $(CBFSTOOL)
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cp $(obj)/coreboot.pre $@
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cp $(obj)/coreboot.pre $@
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if [ -f fallback/coreboot_apc ]; \
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if [ -f fallback/coreboot_apc ]; \
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then \
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then \
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$(CBFSTOOL) $@ add-stage fallback/coreboot_apc fallback/coreboot_apc $(CBFS_COMPRESS_FLAG); \
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$(CBFSTOOL) $@ add-stage fallback/coreboot_apc $(CONFIG_CBFS_PREFIX)/coreboot_apc $(CBFS_COMPRESS_FLAG); \
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fi
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fi
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$(CBFSTOOL) $@ add-stage $(obj)/coreboot_ram fallback/coreboot_ram $(CBFS_COMPRESS_FLAG)
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$(CBFSTOOL) $@ add-stage $(obj)/coreboot_ram $(CONFIG_CBFS_PREFIX)/coreboot_ram $(CBFS_COMPRESS_FLAG)
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ifeq ($(CONFIG_PAYLOAD_NONE),y)
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ifeq ($(CONFIG_PAYLOAD_NONE),y)
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@printf " PAYLOAD none (as specified by user)\n"
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@printf " PAYLOAD none (as specified by user)\n"
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else
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else
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@printf " PAYLOAD $(CONFIG_FALLBACK_PAYLOAD_FILE) $(CBFS_PAYLOAD_COMPRESS_FLAG)\n"
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@printf " PAYLOAD $(CONFIG_FALLBACK_PAYLOAD_FILE) $(CBFS_PAYLOAD_COMPRESS_FLAG)\n"
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$(CBFSTOOL) $(obj)/coreboot.rom add-payload $(CONFIG_FALLBACK_PAYLOAD_FILE) fallback/payload $(CBFS_PAYLOAD_COMPRESS_FLAG)
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$(CBFSTOOL) $(obj)/coreboot.rom add-payload $(CONFIG_FALLBACK_PAYLOAD_FILE) $(CONFIG_CBFS_PREFIX)/payload $(CBFS_PAYLOAD_COMPRESS_FLAG)
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endif
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endif
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ifeq ($(CONFIG_VGA_BIOS),y)
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ifeq ($(CONFIG_VGA_BIOS),y)
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@printf " VGABIOS $(CONFIG_FALLBACK_VGA_BIOS_FILE) $(CONFIG_FALLBACK_VGA_BIOS_ID)\n"
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@printf " VGABIOS $(CONFIG_FALLBACK_VGA_BIOS_FILE) $(CONFIG_FALLBACK_VGA_BIOS_ID)\n"
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@ -10,7 +10,7 @@ $(obj)/coreboot.pre1: $(obj)/coreboot.bootblock $(CBFSTOOL)
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$(obj)/coreboot.pre: $(obj)/coreboot.romstage $(obj)/coreboot.pre1 $(CBFSTOOL)
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$(obj)/coreboot.pre: $(obj)/coreboot.romstage $(obj)/coreboot.pre1 $(CBFSTOOL)
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rm -f $@
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rm -f $@
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cp $(obj)/coreboot.pre1 $@
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cp $(obj)/coreboot.pre1 $@
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$(CBFSTOOL) $@ add-stage $(obj)/romstage.elf fallback/romstage x 0x$(shell cat $(obj)/location.txt)
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$(CBFSTOOL) $@ add-stage $(obj)/romstage.elf $(CONFIG_CBFS_PREFIX)/romstage x 0x$(shell cat $(obj)/location.txt)
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#FIXME: location.txt might require an offset of header size
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#FIXME: location.txt might require an offset of header size
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#######################################################################
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#######################################################################
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@ -58,8 +58,8 @@ $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.o: $(obj)/mainboard/$(MAINBOARDDIR)/b
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$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.s: $(obj)/bootblock/bootblock.c
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$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.s: $(obj)/bootblock/bootblock.c
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$(CC) -x assembler-with-cpp -DASSEMBLY -E -I$(src)/include -I$(src)/arch/i386/include -I$(obj) -I$(obj)/bootblock -include $(obj)/config.h -I. -I$(src) $< > $@.new && mv $@.new $@
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$(CC) -x assembler-with-cpp -DASSEMBLY -E -I$(src)/include -I$(src)/arch/i386/include -I$(obj) -I$(obj)/bootblock -include $(obj)/config.h -I. -I$(src) $< > $@.new && mv $@.new $@
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$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc: $(obj)/romcc $(src)/arch/i386/init/bootblock.c
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$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc: $(src)/arch/i386/init/$(subst ",,$(CONFIG_TINY_BOOTBLOCK_SOURCE)) $(obj)/romcc
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$(obj)/romcc $(bootblock_romccflags) -O2 $(ROMCCFLAGS) $(INCLUDES) $(src)/arch/i386/init/bootblock.c -o $@
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$(obj)/romcc $(bootblock_romccflags) -O2 $(ROMCCFLAGS) $(INCLUDES) $< -o $@
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$(obj)/bootblock.elf: $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.o $(obj)/bootblock/ldscript.ld
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$(obj)/bootblock.elf: $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.o $(obj)/bootblock/ldscript.ld
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@printf " LINK $(subst $(obj)/,,$(@))\n"
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@printf " LINK $(subst $(obj)/,,$(@))\n"
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@ -74,7 +74,7 @@ $(obj)/coreboot.romstage: $(obj)/coreboot.pre1 $(initobjs) $(obj)/romstage/ldscr
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$(CC) -nostdlib -nostartfiles -static -o $(obj)/romstage.elf -L$(obj) -T $(obj)/romstage/ldscript.ld $(initobjs)
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$(CC) -nostdlib -nostartfiles -static -o $(obj)/romstage.elf -L$(obj) -T $(obj)/romstage/ldscript.ld $(initobjs)
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$(OBJCOPY) -O binary $(obj)/romstage.elf $(obj)/romstage.bin
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$(OBJCOPY) -O binary $(obj)/romstage.elf $(obj)/romstage.bin
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printf "CONFIG_ROMBASE = 0x" > $(obj)/location.ld
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printf "CONFIG_ROMBASE = 0x" > $(obj)/location.ld
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$(CBFSTOOL) $(obj)/coreboot.pre1 locate $(obj)/romstage.bin fallback/romstage $(CONFIG_XIP_ROM_SIZE) > $(obj)/location.txt
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$(CBFSTOOL) $(obj)/coreboot.pre1 locate $(obj)/romstage.bin $(CONFIG_CBFS_PREFIX)/romstage $(CONFIG_XIP_ROM_SIZE) > $(obj)/location.txt
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cat $(obj)/location.txt >> $(obj)/location.ld
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cat $(obj)/location.txt >> $(obj)/location.ld
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printf ';\nAUTO_XIP_ROM_BASE = CONFIG_ROMBASE & ~(CONFIG_XIP_ROM_SIZE - 1);\n' >> $(obj)/location.ld
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printf ';\nAUTO_XIP_ROM_BASE = CONFIG_ROMBASE & ~(CONFIG_XIP_ROM_SIZE - 1);\n' >> $(obj)/location.ld
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$(CC) -nostdlib -nostartfiles -static -o $(obj)/romstage.elf -L$(obj) -T $(obj)/romstage/ldscript.ld $(initobjs)
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$(CC) -nostdlib -nostartfiles -static -o $(obj)/romstage.elf -L$(obj) -T $(obj)/romstage/ldscript.ld $(initobjs)
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@ -137,10 +137,7 @@ str_pre_main: .string "Jumping to coreboot.\r\n"
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#endif /* ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG */
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#endif /* ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG */
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#if CONFIG_USE_FALLBACK_IMAGE == 1
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str_coreboot_ram_name: .ascii CONFIG_CBFS_PREFIX
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str_coreboot_ram_name: .string "fallback/coreboot_ram"
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.string "/coreboot_ram"
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#else
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str_coreboot_ram_name: .string "normal/coreboot_ram"
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#endif
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#endif /* CONFIG_USE_DCACHE_RAM */
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#endif /* CONFIG_USE_DCACHE_RAM */
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@ -103,11 +103,7 @@ void hardwaremain(int boot_complete)
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* write our configuration tables.
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* write our configuration tables.
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*/
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*/
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lb_mem = write_tables();
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lb_mem = write_tables();
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#if CONFIG_USE_FALLBACK_IMAGE == 1
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cbfs_load_payload(lb_mem, CONFIG_CBFS_PREFIX "/payload");
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cbfs_load_payload(lb_mem, "fallback/payload");
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#else
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cbfs_load_payload(lb_mem, "normal/payload");
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#endif
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printk(BIOS_ERR, "Boot failed.\n");
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printk(BIOS_ERR, "Boot failed.\n");
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}
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}
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@ -7,21 +7,13 @@ void cbfs_and_run_core(const char*, unsigned ebp);
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static void copy_and_run(void)
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static void copy_and_run(void)
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{
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{
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#if CONFIG_USE_FALLBACK_IMAGE == 1
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cbfs_and_run_core(CONFIG_CBFS_PREFIX "/coreboot_ram", 0);
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cbfs_and_run_core("fallback/coreboot_ram", 0);
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#else
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cbfs_and_run_core("normal/coreboot_ram", 0);
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#endif
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}
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}
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#if CONFIG_AP_CODE_IN_CAR == 1
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#if CONFIG_AP_CODE_IN_CAR == 1
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static void copy_and_run_ap_code_in_car(unsigned ret_addr)
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static void copy_and_run_ap_code_in_car(unsigned ret_addr)
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{
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{
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# if CONFIG_USE_FALLBACK_IMAGE == 1
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cbfs_and_run_core(CONFIG_CBFS_PREFIX "/coreboot_apc", ret_addr);
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cbfs_and_run_core("fallback/coreboot_apc", ret_addr);
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# else
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cbfs_and_run_core("normal/coreboot_apc", ret_addr);
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# endif
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}
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}
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#endif
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#endif
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@ -278,8 +278,5 @@ str_pre_main: .string "Jumping to coreboot.\r\n"
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.previous
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.previous
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#endif /* ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG */
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#endif /* ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG */
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#if CONFIG_USE_FALLBACK_IMAGE == 1
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str_coreboot_ram_name: .ascii CONFIG_CBFS_PREFIX
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str_coreboot_ram_name: .string "fallback/coreboot_ram"
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.string "/coreboot_ram"
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#else
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str_coreboot_ram_name: .string "normal/coreboot_ram"
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#endif
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