more breakage, thanks to Ron

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1665 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Ronald G. Minnich 2004-10-14 21:40:58 +00:00
parent 03acab694b
commit 4b93394872
4 changed files with 256 additions and 425 deletions

View File

@ -1,127 +1,3 @@
uses HAVE_MP_TABLE
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
uses HAVE_HARD_RESET
uses HARD_RESET_BUS
uses HARD_RESET_DEVICE
uses HARD_RESET_FUNCTION
uses IRQ_SLOT_COUNT
uses HAVE_OPTION_TABLE
uses CONFIG_MAX_CPUS
uses CONFIG_IOAPIC
uses CONFIG_SMP
uses FALLBACK_SIZE
uses ROM_SIZE
uses ROM_SECTION_SIZE
uses ROM_IMAGE_SIZE
uses ROM_SECTION_SIZE
uses ROM_SECTION_OFFSET
uses CONFIG_ROM_STREAM
uses CONFIG_ROM_STREAM_START
uses PAYLOAD_SIZE
uses _ROMBASE
uses XIP_ROM_SIZE
uses XIP_ROM_BASE
uses STACK_SIZE
uses HEAP_SIZE
uses USE_OPTION_TABLE
uses LB_CKS_RANGE_START
uses LB_CKS_RANGE_END
uses LB_CKS_LOC
uses MAINBOARD_PART_NUMBER
uses MAINBOARD_VENDOR
uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
## ROM_SIZE is the size of boot ROM that this board will use.
default ROM_SIZE=524288
###
### Build options
###
##
## Build code for the fallback boot
##
default HAVE_FALLBACK_BOOT=1
##
## Build code to reset the motherboard from linuxBIOS
##
default HAVE_HARD_RESET=1
default HARD_RESET_BUS=1
default HARD_RESET_DEVICE=4
default HARD_RESET_FUNCTION=0
##
## Build code to export a programmable irq routing table
##
default HAVE_PIRQ_TABLE=1
default IRQ_SLOT_COUNT=9
##
## Build code to export an x86 MP table
## Useful for specifying IRQ routing values
##
default HAVE_MP_TABLE=1
##
## Build code to export a CMOS option table
##
default HAVE_OPTION_TABLE=1
##
## Move the default LinuxBIOS cmos range off of AMD RTC registers
##
default LB_CKS_RANGE_START=49
default LB_CKS_RANGE_END=122
default LB_CKS_LOC=123
##
## Build code for SMP support
## Only worry about 2 micro processors
##
default CONFIG_SMP=1
default CONFIG_MAX_CPUS=2
##
## Build code to setup a generic IOAPIC
##
default CONFIG_IOAPIC=1
##
## Clean up the motherboard id strings
##
default MAINBOARD_PART_NUMBER="HDAMA"
default MAINBOARD_VENDOR="ARIMA"
default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x161f
default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x3016
###
### LinuxBIOS layout values
###
## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
default ROM_IMAGE_SIZE = 65536
##
## Use a small 8K stack
##
default STACK_SIZE=0x2000
##
## Use a small 32K heap
##
default HEAP_SIZE=0x8000
##
## Only use the option table in a normal image
##
default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
##
## Compute the location and size of where this firmware image
## (linuxBIOS plus bootloader) will live in the boot rom chip.
@ -157,203 +33,72 @@ default _ROMBASE = ( CONFIG_ROM_STREAM_START + PAYLOAD_SIZE )
default XIP_ROM_SIZE=65536
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
##
## Set all of the defaults for an x86 architecture
##
arch i386 end
##
## Build the objects we have code for in this directory.
##
driver mainboard.o
if HAVE_MP_TABLE object mptable.o end
if HAVE_PIRQ_TABLE object irq_tables.o end
##
## Romcc output
##
makerule ./failover.E
depends "$(MAINBOARD)/failover.c"
action "$(CPP) -I$(TOP)/src $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/failover.c > ./failover.E"
end
makerule ./failover.inc
depends "./failover.E ./romcc"
action "./romcc -O -o failover.inc --label-prefix=failover ./failover.E"
end
makerule ./auto.E
depends "$(MAINBOARD)/auto.c option_table.h "
action "$(CPP) -I$(TOP)/src -I. $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/auto.c > ./auto.E"
end
makerule ./auto.inc
depends "./auto.E ./romcc"
action "./romcc -mcpu=k8 -O2 ./auto.E > auto.inc"
end
##
## Build our 16 bit and 32 bit linuxBIOS entry code
##
mainboardinit cpu/x86/16bit/entry16.inc
mainboardinit cpu/x86/32bit/entry32.inc
ldscript /cpu/x86/16bit/entry16.lds
ldscript /cpu/x86/32bit/entry32.lds
##
## Build our reset vector (This is where linuxBIOS is entered)
##
if USE_FALLBACK_IMAGE
mainboardinit cpu/x86/16bit/reset16.inc
ldscript /cpu/x86/16bit/reset16.lds
else
mainboardinit cpu/x86/32bit/reset32.inc
ldscript /cpu/x86/32bit/reset32.lds
end
### Should this be in the northbridge code?
mainboardinit arch/i386/lib/cpu_reset.inc
##
## Include an id string (For safe flashing)
##
mainboardinit arch/i386/lib/id.inc
ldscript /arch/i386/lib/id.lds
###
### This is the early phase of linuxBIOS startup
### Things are delicate and we test to see if we should
### failover to another image.
###
if USE_FALLBACK_IMAGE
ldscript /arch/i386/lib/failover.lds
mainboardinit ./failover.inc
end
###
### O.k. We aren't just an intermediary anymore!
###
##
## Setup RAM
##
mainboardinit cpu/x86/fpu/enable_fpu.inc
mainboardinit cpu/x86/mmx/enable_mmx.inc
mainboardinit cpu/x86/sse/enable_sse.inc
mainboardinit ./auto.inc
mainboardinit cpu/x86/sse/disable_sse.inc
mainboardinit cpu/x86/mmx/disable_mmx.inc
##
## Include the secondary Configuration files
##
dir /pc80
config chip.h
northbridge amd/amdk8 "mc0"
pnp cf8.0
northbridge amd/amdk8 "mc1" link 0
pci 0:19.0
pci 0:19.0
pci 0:19.0
pci 0:19.1
pci 0:19.2
pci 0:19.3
end
pci 1:18.0
southbridge amd/amd8131 "amd8131" link 1
pci 0:0.0
pci 0:0.1
pci 0:1.0
pci 0:1.1
end
southbridge amd/amd8111 "amd8111" link 1
pci 0:0.0
pci 0:1.0 on
superio NSC/pc87360 link 1
pnp 2e.0 off # Floppy
io 0x60 = 0x3f0
irq 0x70 = 6
drq 0x74 = 2
pnp 2e.1 off # Parallel Port
io 0x60 = 0x378
irq 0x70 = 7
pnp 2e.2 off # Com 2
io 0x60 = 0x2f8
irq 0x70 = 3
pnp 2e.3 on # Com 1
io 0x60 = 0x3f8
irq 0x70 = 4
pnp 2e.4 off # SWC
pnp 2e.5 off # Mouse
pnp 2e.6 on # Keyboard
io 0x60 = 0x60
io 0x62 = 0x64
irq 0x70 = 1
pnp 2e.7 off # GPIO
pnp 2e.8 off # ACB
pnp 2e.9 off # FSCM
pnp 2e.a off # WDT
end
pci 0:1.1 on
pci 0:1.2 on
pci 0:1.3 on # ACPI/SMBUS
chip drivers/generic/generic link 4
#phillips pca9545 smbus mux
i2c 70
# analog_devices adm1026
chip drivers/generic/generic link 0
i2c 2c
# sample config for arima/hdama
chip northbridge/amd/amdk8
print "HI MOM!\n"
device pnp cf8.0 on # cf8 config
print "HI MOM!\n"
device pci 18.0 on # northbridge
print "HI MOM!\n"
# devices on link 0, link 0 == LDT 0
chip southbridge/amd/amd8131
print "SOUTH\n"
# the on/off keyword is mandatory
device pci 0.0 on end
print "SOUTH2\n"
device pci 0.1 on end
print "SOUTH3\n"
device pci 1.0 on end
print "SOUTH4\n"
device pci 1.1 on end
end
chip southbridge/amd/amd8111
print "NEXT SOUTH\n"
# this "device pci 0.0" is the parent the next one
# PCI bridge
device pci 0.0 on
# this "device pci 0.0" is a child of the
# previous one
# devices behind the bridge
device pci 0.0 on end
device pci 0.1 on end
device pci 0.2 on end
# the device statement can span across multiple
# lines too
device pci 1.0
off
end
i2c 70
i2c 70
i2c 70
end
device pci 1.0 on
chip superio/NSC/pc87360
device pnp 2e.3 on
io 0x60 = 0x3f8
irq 0x70 = 4
end
end
end
device pci 1.1 on end
device pci 1.2 off end
device pci 1.3 off end
device pci 1.5 on end
device pci 1.6 on end
end
chip drivers/generic/generic link 4 #dimm 0-0-0
i2c 50
end
chip drivers/generic/generic link 4 #dimm 0-0-1
i2c 51
end
chip drivers/generic/generic link 4 #dimm 0-1-0
i2c 52
end
chip drivers/generic/generic link 4 #dimm 0-1-1
i2c 53
end
chip drivers/generic/generic link 4 #dimm 1-0-0
i2c 54
end
chip drivers/generic/generic link 4 #dimm 1-0-1
i2c 55
end
chip drivers/generic/generic link 4 #dimm 1-1-0
i2c 56
end
chip drivers/generic/generic link 4 #dimm 1-1-1
i2c 57
end
pci 0:1.5 off
pci 0:1.6 off
pci 1:0.0 on
pci 1:0.1 on
pci 1:0.2 on
pci 1:1.0 off
end
pci 1:18.0
pci 1:18.0
pci 1:18.1
pci 1:18.2
pci 1:18.3
end
cpu amd/socket_940 "cpu0" link 1
apic 0
end
cpu amd/socket_940 "cpu1" link 1
apic 1
end # device pci 18.0
device pci 18.0 on
# some non-existence devices on link 1
end
device pci 18.0 on
# some non-existence devices on link 2
end
device pci 18.1
# empty
end
device pci 18.2
# empty
end
device pci 18.3
# empty
end
end # device pnp
end

View File

@ -0,0 +1,124 @@
uses HAVE_MP_TABLE
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
uses HAVE_HARD_RESET
uses HARD_RESET_BUS
uses HARD_RESET_DEVICE
uses HARD_RESET_FUNCTION
uses IRQ_SLOT_COUNT
uses HAVE_OPTION_TABLE
uses CONFIG_MAX_CPUS
uses CONFIG_IOAPIC
uses CONFIG_SMP
uses FALLBACK_SIZE
uses ROM_SIZE
uses ROM_SECTION_SIZE
uses ROM_IMAGE_SIZE
uses ROM_SECTION_SIZE
uses ROM_SECTION_OFFSET
uses CONFIG_ROM_STREAM
uses CONFIG_ROM_STREAM_START
uses PAYLOAD_SIZE
uses _ROMBASE
uses XIP_ROM_SIZE
uses XIP_ROM_BASE
uses STACK_SIZE
uses HEAP_SIZE
uses USE_OPTION_TABLE
uses LB_CKS_RANGE_START
uses LB_CKS_RANGE_END
uses LB_CKS_LOC
uses MAINBOARD_PART_NUMBER
uses MAINBOARD_VENDOR
uses MAINBOARD
uses LINUXBIOS_EXTRA_VERSION
uses _RAMBASE
## ROM_SIZE is the size of boot ROM that this board will use.
default ROM_SIZE=524288
###
### Build options
###
##
## Build code for the fallback boot
##
default HAVE_FALLBACK_BOOT=1
##
## Build code to reset the motherboard from linuxBIOS
##
default HAVE_HARD_RESET=1
default HARD_RESET_BUS=1
default HARD_RESET_DEVICE=4
default HARD_RESET_FUNCTION=0
##
## Build code to export a programmable irq routing table
##
default HAVE_PIRQ_TABLE=1
default IRQ_SLOT_COUNT=9
##
## Build code to export an x86 MP table
## Useful for specifying IRQ routing values
##
default HAVE_MP_TABLE=1
##
## Build code to export a CMOS option table
##
default HAVE_OPTION_TABLE=1
##
## Move the default LinuxBIOS cmos range off of AMD RTC registers
##
default LB_CKS_RANGE_START=49
default LB_CKS_RANGE_END=122
default LB_CKS_LOC=123
##
## Build code for SMP support
## Only worry about 2 micro processors
##
default CONFIG_SMP=1
default CONFIG_MAX_CPUS=2
##
## Build code to setup a generic IOAPIC
##
default CONFIG_IOAPIC=1
##
## Clean up the motherboard id strings
##
default MAINBOARD_PART_NUMBER="HDAMA"
default MAINBOARD_VENDOR="ARIMA"
###
### LinuxBIOS layout values
###
## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
default ROM_IMAGE_SIZE = 65536
##
## Use a small 8K stack
##
default STACK_SIZE=0x2000
##
## Use a small 16K heap
##
default HEAP_SIZE=0x4000
##
## Only use the option table in a normal image
##
default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
default _RAMBASE=0x00004000
end

View File

@ -2,97 +2,15 @@
# the Arima HDAMA
# This will make a target directory of ./hdama
loadoptions
target hdama
mainboard arima/hdama
uses ARCH
uses CONFIG_COMPRESS
uses CONFIG_IOAPIC
uses CONFIG_ROM_STREAM
uses CONFIG_ROM_STREAM_START
uses CONFIG_UDELAY_TSC
uses CPU_FIXUP
uses FALLBACK_SIZE
uses HAVE_FALLBACK_BOOT
uses HAVE_MP_TABLE
uses HAVE_PIRQ_TABLE
uses HAVE_HARD_RESET
uses i586
uses i686
uses INTEL_PPRO_MTRR
uses HEAP_SIZE
uses IRQ_SLOT_COUNT
uses k7
uses k8
uses MAINBOARD_PART_NUMBER
uses MAINBOARD_VENDOR
uses CONFIG_SMP
uses CONFIG_MAX_CPUS
uses MEMORY_HOLE
uses PAYLOAD_SIZE
uses _RAMBASE
uses _ROMBASE
uses ROM_IMAGE_SIZE
uses ROM_SECTION_OFFSET
uses ROM_SECTION_SIZE
uses ROM_SIZE
uses STACK_SIZE
uses USE_FALLBACK_IMAGE
uses USE_OPTION_TABLE
uses HAVE_OPTION_TABLE
uses MAXIMUM_CONSOLE_LOGLEVEL
uses DEFAULT_CONSOLE_LOGLEVEL
uses CONFIG_CONSOLE_SERIAL8250
uses MAINBOARD
uses CONFIG_CHIP_CONFIGURE
uses XIP_ROM_SIZE
uses XIP_ROM_BASE
uses LINUXBIOS_EXTRA_VERSION
option CONFIG_CHIP_CONFIGURE=1
option MAXIMUM_CONSOLE_LOGLEVEL=8
option DEFAULT_CONSOLE_LOGLEVEL=8
option CONFIG_CONSOLE_SERIAL8250=1
option CPU_FIXUP=1
option CONFIG_UDELAY_TSC=0
option i686=1
option i586=1
option INTEL_PPRO_MTRR=1
option k7=1
option k8=1
option ROM_SIZE=524288
option HAVE_OPTION_TABLE=1
option CONFIG_ROM_STREAM=1
option HAVE_FALLBACK_BOOT=1
###
### Compute the location and size of where this firmware image
### (linuxBIOS plus bootloader) will live in the boot rom chip.
###
option FALLBACK_SIZE=131072
## LinuxBIOS C code runs at this location in RAM
option _RAMBASE=0x00004000
#
###
### Compute the start location and size size of
### The linuxBIOS bootloader.
###
#
# Arima hdama
romimage "normal"
option USE_FALLBACK_IMAGE=0
option ROM_IMAGE_SIZE=0x10000
option LINUXBIOS_EXTRA_VERSION=".0Normal"
mainboard arima/hdama
payload /usr/share/etherboot/5.2.1eb1-lnxi-lb/tg3--ide_disk.zelf
end
@ -100,7 +18,6 @@ romimage "fallback"
option USE_FALLBACK_IMAGE=1
option ROM_IMAGE_SIZE=0x10000
option LINUXBIOS_EXTRA_VERSION=".0Fallback"
mainboard arima/hdama
payload /usr/share/etherboot/5.2.1eb1-lnxi-lb/tg3--ide_disk.zelf
# use this to test a build if you don't have the etherboot
# payload /etc/hosts

View File

@ -12,6 +12,7 @@ errors = 0
target_dir = ''
target_name = ''
treetop = ''
full_mainboard_path = ''
global_options = {}
global_options_by_order = []
global_option_values = {}
@ -841,6 +842,7 @@ def newoptionvalue(name, image):
def getoptionvalue(name, op, image):
global global_option_values
#print "getoptionvalue name %s op %s image %s\n" % (name, op,image)
if (op == 0):
fatal("Option %s undefined (missing use command?)" % name)
if (image):
@ -856,12 +858,16 @@ def getoption(name, image):
global global_uses_options, alloptions, curimage
#print "getoption: name %s image %s alloptions %s curimage %s\n\n" % (name, image, alloptions, curimage)
curpart = partstack.tos()
if (alloptions):
#print "ALLOPTIONS\n"
o = getdict(global_options, name)
elif (curpart):
#print "CURPART\n"
o = getdict(curpart.uses_options, name)
else:
#print "GLOBAL_USES_OPTIONS\n"
o = getdict(global_uses_options, name)
v = getoptionvalue(name, o, image)
if (v == 0):
@ -1057,12 +1063,12 @@ def validdef(name, defval):
if ((defval & 4) != 4):
fatal("Must specify comment for option %s" % name)
def loadoptions():
file = os.path.join('src', 'config', 'Options.lb')
def loadoptions(path, file, rule):
file = os.path.join('src', path, file)
optionsfile = os.path.join(treetop, file)
fp = safe_open(optionsfile, 'r')
loc.push(file)
if (not parse('options', fp.read())):
if (not parse(rule, fp.read())):
fatal("Could not parse file")
loc.pop()
@ -1112,7 +1118,7 @@ def payload(path):
def startromimage(name):
global romimages, curimage, target_dir, target_name
print "Configuring ROMIMAGE %s" % name
print "Configuring ROMIMAGE %s Curimage %s" % (name, curimage)
o = getdict(romimages, name)
if (o):
fatal("romimage %s previously defined" % name)
@ -1124,19 +1130,29 @@ def startromimage(name):
def endromimage():
global curimage
mainboard()
print "End ROMIMAGE"
curimage = 0
#curpart = 0
def mainboard(path):
full_path = os.path.join(treetop, 'src', 'mainboard', path)
def mainboardsetup(path):
global full_mainboard_path
mainboard_path = os.path.join('mainboard', path)
loadoptions(mainboard_path, 'Options.lb', 'mainboardvariables')
full_mainboard_path = os.path.join(treetop, 'src', 'mainboard', path)
vendor = re.sub("/.*", "", path)
part_number = re.sub("[^/]*/", "", path)
setdefault('MAINBOARD', full_path, 0)
setdefault('MAINBOARD', full_mainboard_path, 0)
setdefault('MAINBOARD_VENDOR', vendor, 0)
setdefault('MAINBOARD_PART_NUMBER', part_number, 0)
dodir('/config', 'Config.lb')
part('mainboard', path, 'Config.lb', 0, 0)
def mainboard():
# a mainboard is no longer really a part as such.
# so just do the config file for the mainboard
#part('mainboard', full_mainboard_path, 'Config.lb', 0, 0)
global full_mainboard_path
mainboard_path = os.path.join(full_mainboard_path)
loadoptions(mainboard_path, 'Config.lb', 'cfgfile')
curimage.setroot(partstack.tos())
partpop()
@ -1177,6 +1193,16 @@ def cpudir(path):
dodir(srcdir, "Config.lb")
cpu_type = path
def simplepart(type):
global curimage, dirstack, partstack
newpart = partobj(curimage, 0, partstack.tos(), type, \
'', 0, 0)
print "Configuring PART %s" % (type)
partstack.push(newpart)
print " new PART tos is now %s\n" %partstack.tos()
# just push TOS, so that we can pop later.
dirstack.push(dirstack.tos())
def part(type, path, file, name, link):
global curimage, dirstack, partstack
partdir = os.path.join(type, path)
@ -1187,6 +1213,7 @@ def part(type, path, file, name, link):
type_name, name, link)
print "Configuring PART %s, path %s" % (type, path)
partstack.push(newpart)
print " new PART tos is now %s\n" %partstack.tos()
dirstack.push(fulldir)
# special case for 'cpu' parts.
# we could add a new function too, but this is rather trivial.
@ -1209,6 +1236,7 @@ def partpop():
notice("Option %s using default value %s" % (op, getformated(op, curpart.image)))
partstack.pop()
dirstack.pop()
print "partstack.pop, TOS is now %s\n" % partstack.tos()
def dodir(path, file):
"""dodir is like part but there is no new part"""
@ -1334,6 +1362,7 @@ parser Config:
token DEFAULT: 'default'
token DEFINE: 'define'
token DEPENDS: 'depends'
token DEVICE: 'device'
token DIR: 'dir'
token DRIVER: 'driver'
token DRQ: 'drq'
@ -1514,26 +1543,32 @@ parser Config:
{{ if (C): partstack.tos().end_resources() }}
rule pci<<C>>: PCI HEX_NUM {{ bus = int(HEX_NUM,16) }}
':' HEX_NUM {{ slot = int(HEX_NUM,16) }}
rule pci<<C>>: PCI {{ if (C): simplepart('pci') }}
HEX_NUM {{ slot = int(HEX_NUM,16) }}
'.' HEX_NUM {{ function = int(HEX_NUM, 16) }}
enable
{{ if (C): partstack.tos().addpcipath(enable, bus, slot, function) }}
{{ if (C): partstack.tos().addpcipath(enable, 0, slot, function) }}
resources<<C>>
partend<<C>>
rule pnp<<C>>: PNP HEX_NUM {{ port = int(HEX_NUM,16) }}
rule pnp<<C>>: PNP {{ if (C): simplepart('pnp') }}
HEX_NUM {{ port = int(HEX_NUM,16) }}
'.' HEX_NUM {{ device = int(HEX_NUM, 16) }}
enable
{{ if (C): partstack.tos().addpnppath(enable, port, device) }}
resources<<C>>
partend<<C>>
rule i2c<<C>>: I2C HEX_NUM {{ device = int(HEX_NUM, 16) }}
rule i2c<<C>>: I2C {{ if (C): simplepart('i2c') }}
HEX_NUM {{ device = int(HEX_NUM, 16) }}
enable
{{ if (C): partstack.tos().addi2cpath(enable, device) }}
resources<<C>>
rule apic<<C>>: APIC HEX_NUM {{ apic_id = int(HEX_NUM, 16) }}
rule apic<<C>>: APIC {{ if (C): simplepart('apic') }}
HEX_NUM {{ apic_id = int(HEX_NUM, 16) }}
enable
{{ if (C): partstack.tos().addapicpath(enable, apic_id) }}
resources<<C>>
@ -1558,6 +1593,8 @@ parser Config:
rule config<<C>>: CONFIG PATH {{ if (C): addconfig(PATH) }}
rule device<<C>>: DEVICE dev_path<<C>>
rule stmt<<C>>: arch<<C>> {{ return arch}}
| addaction<<C>> {{ return addaction }}
| config<<C>> {{ return config}}
@ -1577,17 +1614,26 @@ parser Config:
| partdef<<C>> {{ return partdef }}
| prtstmt<<C>> {{ return prtstmt }}
| register<<C>> {{ return register }}
| dev_path<<C>> {{ return dev_path }}
| device<<C>> {{ return device }}
# ENTRY for parsing Config.lb file
rule cfgfile: (uses<<1>>)*
(stmt<<1>>)*
EOF {{ return 1 }}
rule cfgfile: (uses<<1>>)*
(stmt<<1>>)*
EOF {{ return 1 }}
rule usesid<<C>>: ID {{ if (C): usesoption(ID) }}
rule uses<<C>>: USES (usesid<<C>>)+
rule mainboardvariables: (uses<<1>>)*
(default<<1>>)*
(option<<1>>)*
END {{ return 1}}
rule value: STR {{ return dequote(STR) }}
| expr {{ return expr }}
| DELEXPR {{ return DELEXPR }}
@ -1605,8 +1651,8 @@ parser Config:
rule payload<<C>>: PAYLOAD DIRPATH {{ if (C): payload(DIRPATH) }}
rule mainboard<<C>>:
MAINBOARD PATH {{ if (C): mainboard(PATH) }}
rule mainboard:
MAINBOARD PATH {{ mainboardsetup(PATH) }}
rule romif<<C>>: IF ID {{ c = lookup(ID) }}
(romstmt<<C and c>>)*
@ -1615,7 +1661,6 @@ parser Config:
rule romstmt<<C>>: romif<<C>>
| option<<C>>
| mainboard<<C>>
| payload<<C>>
rule romimage: ROMIMAGE STR {{ startromimage(dequote(STR)) }}
@ -1633,9 +1678,9 @@ parser Config:
| opstmt<<1>>
# ENTRY for parsing root part
rule board: LOADOPTIONS {{ loadoptions() }}
rule board: {{ loadoptions("config", "Options.lb", "options") }}
TARGET DIRPATH {{ target(DIRPATH) }}
(uses<<1>>)*
mainboard
(romstmts)*
EOF {{ return 1 }}