mb/starlabs/labtop: Add enum for `power_profile`
Introduce and use an enum for the `power_profile` CMOS option. Add a helper function that converts CMOS values into enum values. Using an enum allows GCC to warn about switch statements using enum types for their control expressions not handling all possible enum values, and also improves readability. Change-Id: I47a453ea12d164d26908a9944a89a481757e753c Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60212 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <admin@starlabs.systems> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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@ -5,6 +5,15 @@
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#include <soc/gpio.h>
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enum cmos_power_profile {
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PP_POWER_SAVER = 0,
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PP_BALANCED = 1,
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PP_PERFORMANCE = 2,
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};
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#define NUM_POWER_PROFILES 3
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enum cmos_power_profile get_power_profile(enum cmos_power_profile fallback);
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/*
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* The next set of functions return the gpio table and fill in the number of
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* entries for each table.
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@ -5,6 +5,12 @@
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#include <option.h>
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#include <variants.h>
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enum cmos_power_profile get_power_profile(enum cmos_power_profile fallback)
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{
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const unsigned int power_profile = get_uint_option("power_profile", fallback);
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return power_profile < NUM_POWER_PROFILES ? power_profile : fallback;
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}
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static void init_mainboard(void *chip_info)
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{
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const struct pad_config *pads;
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@ -24,26 +24,26 @@ void devtree_update(void)
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/* Update PL1 & PL2 based on CMOS settings */
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switch (get_uint_option("power_profile", 0)) {
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case 1:
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soc_conf_2core->tdp_pl1_override = 15;
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soc_conf_4core->tdp_pl1_override = 15;
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soc_conf_2core->tdp_pl2_override = 25;
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soc_conf_4core->tdp_pl2_override = 25;
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break;
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case 2:
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soc_conf_2core->tdp_pl1_override = 28;
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soc_conf_4core->tdp_pl1_override = 28;
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soc_conf_2core->tdp_pl2_override = 40;
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soc_conf_4core->tdp_pl2_override = 40;
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break;
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default:
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switch (get_power_profile(PP_POWER_SAVER)) {
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case PP_POWER_SAVER:
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disable_turbo();
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soc_conf_2core->tdp_pl1_override = 15;
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soc_conf_4core->tdp_pl1_override = 15;
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soc_conf_2core->tdp_pl2_override = 15;
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soc_conf_4core->tdp_pl2_override = 15;
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break;
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case PP_BALANCED:
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soc_conf_2core->tdp_pl1_override = 15;
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soc_conf_4core->tdp_pl1_override = 15;
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soc_conf_2core->tdp_pl2_override = 25;
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soc_conf_4core->tdp_pl2_override = 25;
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break;
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case PP_PERFORMANCE:
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soc_conf_2core->tdp_pl1_override = 28;
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soc_conf_4core->tdp_pl1_override = 28;
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soc_conf_2core->tdp_pl2_override = 40;
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soc_conf_4core->tdp_pl2_override = 40;
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break;
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}
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/* Enable/Disable Wireless based on CMOS settings */
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