vendorcode/amd/pi/00670F00: Control which procedure builds

Vendor code is compiled as a library, thus the whole library is included
into the final image. However, not all procedures are required, they are
there because original AGESA code had them. We cannot remove them, in order
to facilitate porting of fixed AGESA code. Therefor add #if throughout the
code to allow the control if unneeded procedures will be build.

BUG=b:78610011
TEST=Build and boot grunt; build kahlee and gardenia.

Change-Id: I68f9e359b2331f715a3b85486c4181866985afdf
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/26135
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Richard Spiegel 2018-05-07 07:53:42 -07:00 committed by Patrick Georgi
parent 9c1dc7cbe1
commit 4bb706555e
7 changed files with 47 additions and 1 deletions

View File

@ -393,4 +393,11 @@ config MAINBOARD_POWER_RESTORE
return to S0. Otherwise the system will remain in S5 once power
is restored.
config VENDORCODE_FULL_SUPPORT
def_bool n
help
This option determines if all files under
vendorcode/amd/pi/00670F00/ will be compiled or only
selected procedures of source files (minimum required).
endif # SOC_AMD_STONEYRIDGE_FP4 || SOC_AMD_STONEYRIDGE_FT4

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@ -274,6 +274,7 @@ Write64Mem32 (
}
}
#if IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT)
AMDLIB_OPTIMIZE
VOID
LibAmdReadCpuReg (
@ -388,6 +389,7 @@ LibAmdBitScanReverse (
return 0xFF; /* Error code indicating no bit found */
}
#endif /* IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT) */
AMDLIB_OPTIMIZE
VOID
@ -414,6 +416,7 @@ LibAmdMsrWrite (
__writemsr (MsrAddress, *Value);
}
#if IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT)
AMDLIB_OPTIMIZE
void LibAmdCpuidRead (
IN UINT32 CpuidFcnAddress,
@ -499,6 +502,7 @@ LibAmdFinit(
/* TODO: finit */
__asm__ volatile ("finit");
}
#endif /* IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT) */
/*---------------------------------------------------------------------------------------*/
/**
* Read IO port
@ -605,6 +609,7 @@ LibAmdIoRMW (
LibAmdIoWrite (AccessWidth, IoAddress, &Value, NULL);
}
#if IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT)
/*---------------------------------------------------------------------------------------*/
/**
* Poll IO register
@ -637,6 +642,7 @@ LibAmdIoPoll (
LibAmdIoRead (AccessWidth, IoAddress, &Value, NULL);
} while (TempData != (Value & TempMask));
}
#endif /* IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT) */
/*---------------------------------------------------------------------------------------*/
/**
@ -744,6 +750,7 @@ LibAmdMemRMW (
LibAmdMemWrite (AccessWidth, MemAddress, &Value, NULL);
}
#if IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT)
/*---------------------------------------------------------------------------------------*/
/**
* Poll Mmio
@ -776,6 +783,7 @@ LibAmdMemPoll (
LibAmdMemRead (AccessWidth, MemAddress, &Value, NULL);
} while (TempData != (Value & TempMask));
}
#endif /* IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT) */
/*---------------------------------------------------------------------------------------*/
/**
@ -913,6 +921,7 @@ LibAmdPciRMW (
LibAmdPciWrite (AccessWidth, PciAddress, &Value, NULL);
}
#if IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT)
/*---------------------------------------------------------------------------------------*/
/**
* Poll PCI config space register
@ -945,6 +954,7 @@ LibAmdPciPoll (
LibAmdPciRead (AccessWidth, PciAddress, &Value, NULL);
} while (TempData != (Value & TempMask));
}
#endif /* IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT) */
/*---------------------------------------------------------------------------------------*/
/**
@ -979,6 +989,7 @@ GetPciMmioAddress (
return MmioIsEnabled;
}
#if IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT)
/*---------------------------------------------------------------------------------------*/
/**
* Read field of PCI config register.
@ -1177,6 +1188,7 @@ LibAmdMemCopy (
*Dest++ = *SourcePtr++;
}
}
#endif /* IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT) */
/*---------------------------------------------------------------------------------------*/
/**
@ -1261,6 +1273,7 @@ LibAmdLocateImage (
return NULL;
}
#if IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT)
/*---------------------------------------------------------------------------------------*/
/**
* Returns the package type mask for the processor
@ -1282,6 +1295,7 @@ LibAmdGetPackageType (
ProcessorPackageType = (UINT32) (CpuId.EBX_Reg >> 28) & 0xF; // bit 31:28
return (UINT32) (1 << ProcessorPackageType);
}
#endif /* IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT) */
/*---------------------------------------------------------------------------------------*/
/**
@ -1327,6 +1341,7 @@ LibAmdGetDataFromPtr (
}
}
#if IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT)
/*---------------------------------------------------------------------------------------*/
/**
* Returns the package type mask for the processor
@ -1388,6 +1403,7 @@ ReadNumberOfCpuCores(
CpuidRead (0x80000008, &Value);
return Value.ECX_Reg & 0xff;
}
#endif /* IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT) */
BOOLEAN
IdsErrorStop (

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@ -90,10 +90,14 @@ agesa_raw_files += $(wildcard $(AGESA_ROOT)/Lib/*.[cS])
agesa_raw_files += $(wildcard $(AGESA_ROOT)/binaryPI/*.[cS])
ifeq ($(CONFIG_VENDORCODE_FULL_SUPPORT),y)
agesa_raw_files += $(wildcard $(AGESA_ROOT)/Proc/Fch/Common/*.[cS])
endif
agesa_raw_files += $(wildcard $(AGESA_ROOT)/Proc/Psp/PspBaseLib/*.[cS])
ifeq ($(CONFIG_STONEYRIDGE_IMC_FWM),y)
agesa_raw_files += $(wildcard $(AGESA_ROOT)/Lib/imc/*.c)
agesa_raw_files += $(AGESA_ROOT)/Proc/Fch/Common/FchLib.c
agesa_raw_files += $(AGESA_ROOT)/Proc/Fch/Common/FchPeLib.c
endif
classes-$(CONFIG_CPU_AMD_AGESA_BINARY_PI) += libagesa

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@ -77,6 +77,7 @@ FchStall (
}
}
#if IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT)
/**< cimFchStall - Reserved */
VOID
CimFchStall (
@ -670,3 +671,4 @@ ClearAllSmiStatus (
ACPIMMIO8 (0xfed80280 + Index) |= 0;
}
}
#endif /* IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT) */

View File

@ -52,6 +52,7 @@
*/
#define FILECODE PROC_FCH_COMMON_FCHPELIB_FILECODE
#if IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT)
/*----------------------------------------------------------------------------------------*/
/**
* ProgramPciByteTable - Program PCI register by table (8 bits data)
@ -218,6 +219,7 @@ ProgramFchSataPhyTbl (
}
}
}
#endif /* IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT) */
/**
* GetChipSysMode - Get Chip status
@ -260,7 +262,7 @@ IsImcEnabled (
}
}
#if IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT)
/**
* GetEfuseStatue - Get Efuse status
*
@ -582,3 +584,4 @@ FchGetScratchFuse (
return TempData64;
}
#endif /* IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT) */

View File

@ -223,6 +223,7 @@ GetPspDirBase (
return (FALSE);
}
#if IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT)
/**
* Get specific PSP Entry information, this routine will auto detect the processor for loading
* correct PSP Directory
@ -329,6 +330,7 @@ UpdataPspDirCheckSum (
PspDir->Header.Checksum = Fletcher32 ((UINT16 *) &PspDir->Header.TotalEntries, \
(sizeof (PSP_DIRECTORY_HEADER) - OFFSET_OF (PSP_DIRECTORY_HEADER, TotalEntries) + PspDir->Header.TotalEntries * sizeof (PSP_DIRECTORY_ENTRY)) / 2);
}
#endif /* IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT) */
/**
Check if PSP device is present
@ -351,6 +353,7 @@ CheckPspDevicePresent (
return (FALSE);
}
#if IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT)
/**
Check PSP Platform Seucre Enable State
HVB & Secure S3 (Resume vector set to Dram, & core content will restore by uCode)
@ -418,6 +421,7 @@ GetPspMboxStatus (
return (TRUE);
}
#endif /* IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT) */
BOOLEAN
PspBarInitEarly ()
@ -454,6 +458,7 @@ PspBarInitEarly ()
return (TRUE);
}
#if IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT)
/**
Return the PspMMIO MMIO location
@ -478,6 +483,7 @@ GetPspBar1Addr (
return (TRUE);
}
#endif /* IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT) */
/**
Return the PspMMIO MMIO location
@ -513,6 +519,7 @@ GetPspBar3Addr (
return (TRUE);
}
#if IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT)
/**
* Acquire the Mutex for access PSP,X86 co-accessed register
* Call this routine before access SMIx98 & SMIxA8
@ -679,4 +686,5 @@ IsS3Resume (
return ((SleepType == 3) ? TRUE : FALSE);
}
#endif /* IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT) */

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@ -157,6 +157,7 @@ AmdInitLate (
return Dispatcher(LateParams);
}
#if IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT)
/**********************************************************************
* Interface call: AmdInitRecovery
**********************************************************************/
@ -170,6 +171,7 @@ AmdInitRecovery (
if (!Dispatcher) return AGESA_UNSUPPORTED;
return Dispatcher(RecoveryParams);
}
#endif /* IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT) */
/**********************************************************************
* Interface call: AmdInitResume
@ -241,6 +243,7 @@ AmdLateRunApTask (
return Dispatcher(AmdApExeParams);
}
#if IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT)
/**********************************************************************
* Interface service call: AmdGetApicId
**********************************************************************/
@ -282,6 +285,7 @@ AmdIdentifyCore (
if (!Dispatcher) return AGESA_UNSUPPORTED;
return Dispatcher(AmdParamIdentify);
}
#endif /* IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT) */
/**********************************************************************
* Interface service call: AmdReadEventLog
@ -297,6 +301,7 @@ AmdReadEventLog (
return Dispatcher(Event);
}
#if IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT)
/**********************************************************************
* Interface service call: AmdIdentifyDimm
**********************************************************************/
@ -333,3 +338,4 @@ AmdGet2DDataEye (
if (!Dispatcher) return AGESA_UNSUPPORTED;
return Dispatcher(AmdGetDataEye);
}
#endif /* IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT) */