soc/amd/common/include/psp_efs: rename new PSP directory EFS entry

The EFS entry at offset 0x14 can point to either the first level PSP
directory table or to the PSP combo directory structure that was used
before the introduction of the AMD A/B recovery scheme. This scheme is
not to be confused with the VBOOT scheme. The PSP verstage code checks
if the header this entry points to begins with the PSP_COOKIE, which
indicates the entry is a first level PSP directory table. Due to that,
the EFS entry at offset 0x14 is always expected to point to a PSP
directory table, so rename combo_psp_directory to new_psp_directory to
match the actual usage. This EFS entry that points to the PSP directory
table is called new_psp_directory, since the entry at EFS offset 0x10
was used on some early AMD chips to point to the older PSP directory
table and that one is already called psp_directory. amdfwtool uses the
same naming scheme for those two PSP directory table pointers.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I10f19ee63f8d422433dba64402d84fd6bb9e0f9e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73083
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/amd/common/block/include/amdblocks/psp_efs.h

@@ -35,7 +35,7 @@ struct embedded_firmware {
 	uint32_t gec_entry;
 	uint32_t xhci_entry;
 	uint32_t psp_directory;
-	uint32_t combo_psp_directory;
+	uint32_t new_psp_directory;
 	uint32_t bios0_entry;
 	uint32_t bios1_entry;
 	uint32_t bios2_entry;

src/soc/amd/common/psp_verstage/psp_verstage.c

@@ -101,7 +101,7 @@ static uint32_t update_boot_region(struct vb2_context *ctx)
 		return POSTCODE_ROMSIG_MISMATCH_ERROR;
 	}
 
-	psp_dir_addr = ef_table->combo_psp_directory;
+	psp_dir_addr = ef_table->new_psp_directory;
 	bios_dir_addr = get_bios_dir_addr(ef_table);
 	psp_dir_in_spi = (uint32_t *)((psp_dir_addr & SPI_ADDR_MASK) +
 			(uint32_t)boot_dev_base);