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superio/smsc: Improve code formatting 

Change-Id: Ia9a3f7795178400de39b36471f4169a9f5a3b08b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39931
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Elyes HAOUAS 2020-03-30 16:46:57 +02:00 committed by Felix Held
parent 03a3404d5b
commit 4c0432ae65
3 changed files with 17 additions and 17 deletions
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16
src/superio/smsc/lpc47m10x/lpc47m10x.h
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@ -7,14 +7,14 @@
#include <device/pnp_type.h> #include <device/pnp_type.h>
#include <stdint.h> #include <stdint.h>
#define LPC47M10X2_FDC 0 /* Floppy */ #define LPC47M10X2_FDC 0 /* Floppy */
#define LPC47M10X2_PP 3 /* Parallel Port */ #define LPC47M10X2_PP 3 /* Parallel Port */
#define LPC47M10X2_SP1 4 /* Com1 */ #define LPC47M10X2_SP1 4 /* Com1 */
#define LPC47M10X2_SP2 5 /* Com2 */ #define LPC47M10X2_SP2 5 /* Com2 */
#define LPC47M10X2_KBC 7 /* Keyboard & Mouse */ #define LPC47M10X2_KBC 7 /* Keyboard & Mouse */
#define LPC47M10X2_GAME 9 /* GAME */ #define LPC47M10X2_GAME 9 /* GAME */
#define LPC47M10X2_PME 10 /* PME reg*/ #define LPC47M10X2_PME 10 /* PME reg*/
#define LPC47M10X2_MPU 11 /* MPU-401 MIDI */ #define LPC47M10X2_MPU 11 /* MPU-401 MIDI */
#define LPC47M10X2_MAX_CONFIG_REGISTER 0x5F #define LPC47M10X2_MAX_CONFIG_REGISTER 0x5F

16
src/superio/smsc/lpc47m15x/lpc47m15x.h
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@ -4,14 +4,14 @@
#ifndef SUPERIO_SMSC_LPC47M15X_H #ifndef SUPERIO_SMSC_LPC47M15X_H
#define SUPERIO_SMSC_LPC47M15X_H #define SUPERIO_SMSC_LPC47M15X_H
#define LPC47M15X_FDC 0 /* Floppy */ #define LPC47M15X_FDC 0 /* Floppy */
#define LPC47M15X_PP 3 /* Parallel Port */ #define LPC47M15X_PP 3 /* Parallel Port */
#define LPC47M15X_SP1 4 /* Com1 */ #define LPC47M15X_SP1 4 /* Com1 */
#define LPC47M15X_SP2 5 /* Com2 */ #define LPC47M15X_SP2 5 /* Com2 */
#define LPC47M15X_KBC 7 /* Keyboard & Mouse */ #define LPC47M15X_KBC 7 /* Keyboard & Mouse */
#define LPC47M15X_GAME 9 /* GAME */ #define LPC47M15X_GAME 9 /* GAME */
#define LPC47M15X_PME 10 /* PME reg*/ #define LPC47M15X_PME 10 /* PME reg*/
#define LPC47M15X_MPU 11 /* MPE -- who knows -- reg*/ #define LPC47M15X_MPU 11 /* MPE -- who knows -- reg*/
#define LPC47M15X2_MAX_CONFIG_REGISTER 0x5F #define LPC47M15X2_MAX_CONFIG_REGISTER 0x5F

2
src/superio/smsc/sch5147/acpi/superio.asl
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@ -45,7 +45,7 @@ Device(SUPERIO_DEV) {
Field (CREG, ByteAcc, NoLock, Preserve) Field (CREG, ByteAcc, NoLock, Preserve)
{ {
PNP_ADDR_REG, 8, PNP_ADDR_REG, 8,
PNP_DATA_REG, 8 PNP_DATA_REG, 8
} }
IndexField (PNP_ADDR_REG, PNP_DATA_REG, ByteAcc, NoLock, Preserve) IndexField (PNP_ADDR_REG, PNP_DATA_REG, ByteAcc, NoLock, Preserve)
{ {