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nocturne: configure VR per Intel recommendation 

These values are Intel recommended.
IccMax = 28A
DC and AC LL = 4mOhms
Pl2 = 18w

BUG=b:79666828
BRANCH=none
TEST=Enabled p-states with patch 
Change-Id:I82d1516998cc26b789faa5d4e897feb06dc06020 and then
"emerge-nocturne depthcharge coreboot chromeos-bootimage", flash spi
image onto nocturne, boot to kernel and verify device stays alive and
responsive for several minutes without locking up.

Change-Id: I4c67c6a095aecc158e529a6b393baf03ec358a3d
Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com>
Reviewed-on: https://review.coreboot.org/27175
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Pratik Prajapati 2018-06-20 17:04:32 -07:00 committed by Patrick Georgi
parent 0545166485
commit 4c067c8550
1 changed files with 7 additions and 7 deletions
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14
src/mainboard/google/poppy/variants/nocturne/devicetree.cb
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@ -62,7 +62,7 @@ chip soc/intel/skylake
# Set speed_shift_enable to 1 to enable P-States, and 0 to disable # Set speed_shift_enable to 1 to enable P-States, and 0 to disable
register "speed_shift_enable" = "1" register "speed_shift_enable" = "1"
register "dptf_enable" = "1" register "dptf_enable" = "1"
register "tdp_pl2_override" = "15" register "tdp_pl2_override" = "18"
register "psys_pmax" = "45" register "psys_pmax" = "45"
register "tcc_offset" = "10" register "tcc_offset" = "10"
register "pch_trip_temp" = "75" register "pch_trip_temp" = "75"
@ -87,10 +87,10 @@ chip soc/intel/skylake
#| Psi4Enable | 1 | 1 | 1 | 1 | #| Psi4Enable | 1 | 1 | 1 | 1 |
#| ImonSlope | 0 | 0 | 0 | 0 | #| ImonSlope | 0 | 0 | 0 | 0 |
#| ImonOffset | 0 | 0 | 0 | 0 | #| ImonOffset | 0 | 0 | 0 | 0 |
#| IccMax | 4A | 24A | 24A | 24A | #| IccMax | 4A | 28A | 24A | 24A |
#| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V | #| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V |
#| AcLoadline | 14.9 | 5 | 5.7 | 4.57 | #| AcLoadline | 14.9 | 4 | 5.7 | 4.57 |
#| DcLoadline | 14.2 | 4.86 | 4.2 | 4.3 | #| DcLoadline | 14.2 | 4 | 4.2 | 4.3 |
#+----------------+-------+-------+-------+-------+ #+----------------+-------+-------+-------+-------+
register "domain_vr_config[VR_SYSTEM_AGENT]" = "{ register "domain_vr_config[VR_SYSTEM_AGENT]" = "{
.vr_config_enable = 1, .vr_config_enable = 1,
@ -116,10 +116,10 @@ chip soc/intel/skylake
.psi4enable = 1, .psi4enable = 1,
.imon_slope = 0x0, .imon_slope = 0x0,
.imon_offset = 0x0, .imon_offset = 0x0,
.icc_max = VR_CFG_AMP(24), .icc_max = VR_CFG_AMP(28),
.voltage_limit = 1520, .voltage_limit = 1520,
.ac_loadline = 500, .ac_loadline = 400,
.dc_loadline = 486, .dc_loadline = 400,
}" }"
register "domain_vr_config[VR_GT_UNSLICED]" = "{ register "domain_vr_config[VR_GT_UNSLICED]" = "{