soc/intel/broadwell: Hook up PCI domain and CPU cluster ops to devicetree

Change-Id: I77a333827552741453d8b575f2a8009b3e1bf8f1
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69301
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

src/mainboard/google/auron/devicetree.cb

@@ -15,6 +15,7 @@ chip soc/intel/broadwell
 	register "ec_present" = "true"
 
 	device cpu_cluster 0 on
+		ops broadwell_cpu_bus_ops
 		chip cpu/intel/haswell
 			register "s0ix_enable" = "1"
 
@@ -24,6 +25,7 @@ chip soc/intel/broadwell
 	end
 
 	device domain 0 on
+		ops broadwell_pci_domain_ops
 		device pci 00.0 on  end # host bridge
 		device pci 02.0 on  end # vga controller
 		device pci 03.0 on  end # mini-hd audio

src/mainboard/google/jecht/devicetree.cb

@@ -12,6 +12,7 @@ chip soc/intel/broadwell
 	register "dq_pins_interleaved" = "true"
 
 	device cpu_cluster 0 on
+		ops broadwell_cpu_bus_ops
 		chip cpu/intel/haswell
 			device lapic 0 on end
 			device lapic 0xacac off end
@@ -19,6 +20,7 @@ chip soc/intel/broadwell
 	end
 
 	device domain 0 on
+		ops broadwell_pci_domain_ops
 		device pci 00.0 on end # host bridge
 		device pci 02.0 on end # vga controller
 		device pci 03.0 on end # mini-hd audio

src/mainboard/intel/wtm2/devicetree.cb

@@ -10,12 +10,14 @@ chip soc/intel/broadwell
 	register "gpu_dp_b_hotplug" = "0x06"
 
 	device cpu_cluster 0 on
+		ops broadwell_cpu_bus_ops
 		chip cpu/intel/haswell
 			device lapic 0 on end
 			device lapic 0xacac off end
 		end
 	end
 	device domain 0 on
+		ops broadwell_pci_domain_ops
 		device pci 00.0 on  end	# host bridge
 		device pci 02.0 on  end	# vga controller
 		device pci 03.0 on  end	# mini-hd audio

src/mainboard/purism/librem_bdw/devicetree.cb

@@ -21,12 +21,14 @@ chip soc/intel/broadwell
 	}"
 
 	device cpu_cluster 0 on
+		ops broadwell_cpu_bus_ops
 		chip cpu/intel/haswell
 			device lapic 0 on end
 			device lapic 0xacac off end
 		end
 	end
 	device domain 0 on
+		ops broadwell_pci_domain_ops
 		device pci 00.0 on  end # host bridge
 		device pci 02.0 on  end # vga controller
 		device pci 03.0 on  end # mini-hd audio

src/soc/intel/broadwell/northbridge.c

@@ -419,7 +419,7 @@ static const struct pci_driver systemagent_driver __pci_driver = {
 	.devices = systemagent_ids
 };
 
-static struct device_operations pci_domain_ops = {
+struct device_operations broadwell_pci_domain_ops = {
 	.read_resources    = &pci_domain_read_resources,
 	.set_resources     = &pci_domain_set_resources,
 	.scan_bus          = &pci_domain_scan_bus,
@@ -428,22 +428,12 @@ static struct device_operations pci_domain_ops = {
 #endif
 };
 
-static struct device_operations cpu_bus_ops = {
+struct device_operations broadwell_cpu_bus_ops = {
 	.read_resources   = noop_read_resources,
 	.set_resources    = noop_set_resources,
 	.init             = mp_cpu_bus_init,
 };
 
-static void broadwell_enable(struct device *dev)
-{
-	/* Set the operations if it is a special bus type */
-	if (dev->path.type == DEVICE_PATH_DOMAIN) {
-		dev->ops = &pci_domain_ops;
-	} else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) {
-		dev->ops = &cpu_bus_ops;
-	}
-}
-
 static void broadwell_init_pre_device(void *chip_info)
 {
 	broadwell_run_reference_code();
@@ -451,6 +441,5 @@ static void broadwell_init_pre_device(void *chip_info)
 
 struct chip_operations soc_intel_broadwell_ops = {
 	CHIP_NAME("Intel Broadwell")
-	.enable_dev = &broadwell_enable,
 	.init       = &broadwell_init_pre_device,
 };