baytrail: add dunit access and registers

The dunit on baytrail is the dram unit. Provide a means
to access the configuration registers there using the
proper IOSF mechanisms.

BUG=chrome-os-partner:22875
BRANCH=none
TEST=Built and booted. Able to read dram registers.

Change-Id: I4d5c019720a7883fe93f3e1860bcd57ce2ea6542
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/170490
Reviewed-on: http://review.coreboot.org/4853
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Aaron Durbin 2013-09-23 14:17:35 -05:00 committed by Aaron Durbin
parent 191570ded8
commit 4c53df4730
2 changed files with 37 additions and 0 deletions

View File

@ -51,6 +51,8 @@
uint32_t iosf_bunit_read(int reg);
void iosf_bunit_write(int reg, uint32_t val);
uint32_t iosf_dunit_read(int reg);
void iosf_dunit_write(int reg, uint32_t val);
/* IOSF ports. */
#define IOSF_PORT_AUNIT 0x00 /* IO Arbiter unit */
@ -106,6 +108,20 @@ void iosf_bunit_write(int reg, uint32_t val);
#define BUNIT_SMRRH 0x2f
# define BUNIT_SMRR_ENABLE (1 << 31)
/*
* DUNIT Registers.
*/
#define DRP 0x00
# define DRP_CH0_RANK0_EN (0x01 << 0)
# define DRP_CH0_RANK1_EN (0x01 << 1)
# define DRP_CH1_RANK0_EN (0x01 << 2)
# define DRP_CH1_RANK1_EN (0x01 << 3)
#define DTR0 0x01
# define DTR0_SPEED_MASK 0x03
# define DTR0_SPEED_800 0x00
# define DTR0_SPEED_1066 0x01
# define DTR0_SPEED_1333 0x02
# define DTR0_SPEED_1600 0x03
#endif /* _BAYTRAIL_IOSF_H_ */

View File

@ -59,3 +59,24 @@ void iosf_bunit_write(int reg, uint32_t val)
write_iosf_reg(MCR_REG, cr);
write_iosf_reg(MDR_REG, val);
}
uint32_t iosf_dunit_read(int reg)
{
uint32_t cr = IOSF_OPCODE(IOSF_OP_READ_SYSMEMC) |
IOSF_PORT(IOSF_PORT_SYSMEMC) | IOSF_REG(reg) |
IOSF_BYTE_EN;
write_iosf_reg(MCR_REG, cr);
return read_iosf_reg(MDR_REG);
}
void iosf_dunit_write(int reg, uint32_t val)
{
uint32_t cr = IOSF_OPCODE(IOSF_OP_WRITE_SYSMEMC) |
IOSF_PORT(IOSF_PORT_SYSMEMC) | IOSF_REG(reg) |
IOSF_BYTE_EN;
write_iosf_reg(MCR_REG, cr);
write_iosf_reg(MDR_REG, val);
}