baytrail: add dunit access and registers
The dunit on baytrail is the dram unit. Provide a means to access the configuration registers there using the proper IOSF mechanisms. BUG=chrome-os-partner:22875 BRANCH=none TEST=Built and booted. Able to read dram registers. Change-Id: I4d5c019720a7883fe93f3e1860bcd57ce2ea6542 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/170490 Reviewed-on: http://review.coreboot.org/4853 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@ -51,6 +51,8 @@
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uint32_t iosf_bunit_read(int reg);
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void iosf_bunit_write(int reg, uint32_t val);
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uint32_t iosf_dunit_read(int reg);
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void iosf_dunit_write(int reg, uint32_t val);
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/* IOSF ports. */
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#define IOSF_PORT_AUNIT 0x00 /* IO Arbiter unit */
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@ -106,6 +108,20 @@ void iosf_bunit_write(int reg, uint32_t val);
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#define BUNIT_SMRRH 0x2f
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# define BUNIT_SMRR_ENABLE (1 << 31)
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/*
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* DUNIT Registers.
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*/
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#define DRP 0x00
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# define DRP_CH0_RANK0_EN (0x01 << 0)
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# define DRP_CH0_RANK1_EN (0x01 << 1)
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# define DRP_CH1_RANK0_EN (0x01 << 2)
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# define DRP_CH1_RANK1_EN (0x01 << 3)
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#define DTR0 0x01
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# define DTR0_SPEED_MASK 0x03
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# define DTR0_SPEED_800 0x00
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# define DTR0_SPEED_1066 0x01
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# define DTR0_SPEED_1333 0x02
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# define DTR0_SPEED_1600 0x03
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#endif /* _BAYTRAIL_IOSF_H_ */
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@ -59,3 +59,24 @@ void iosf_bunit_write(int reg, uint32_t val)
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write_iosf_reg(MCR_REG, cr);
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write_iosf_reg(MDR_REG, val);
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}
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uint32_t iosf_dunit_read(int reg)
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{
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uint32_t cr = IOSF_OPCODE(IOSF_OP_READ_SYSMEMC) |
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IOSF_PORT(IOSF_PORT_SYSMEMC) | IOSF_REG(reg) |
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IOSF_BYTE_EN;
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write_iosf_reg(MCR_REG, cr);
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return read_iosf_reg(MDR_REG);
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}
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void iosf_dunit_write(int reg, uint32_t val)
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{
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uint32_t cr = IOSF_OPCODE(IOSF_OP_WRITE_SYSMEMC) |
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IOSF_PORT(IOSF_PORT_SYSMEMC) | IOSF_REG(reg) |
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IOSF_BYTE_EN;
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write_iosf_reg(MCR_REG, cr);
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write_iosf_reg(MDR_REG, val);
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}
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