GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

fix serial initialization (from Uwe Hermann) 

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2371 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer 2006-08-10 09:38:39 +00:00
parent af9cd4d0cf
commit 4c556c5ccb
4 changed files with 79 additions and 42 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
src/superio/ite/it8671f/chip.h
View File

@ -19,14 +19,6 @@
#ifndef _SUPERIO_ITE_IT8671F
#define _SUPERIO_ITE_IT8671F
// TODO: Unused?
// #ifndef SIO_COM1
// #define SIO_COM1_BASE 0x3F8
// #endif
// #ifndef SIO_COM2
// #define SIO_COM2_BASE 0x2F8
// #endif
#include <pc80/keyboard.h>
#include <uart8250.h>

17
src/superio/ite/it8671f/it8671f.h
View File

@ -16,20 +16,11 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
// TODO: Untested, cut'n'pasted from some other file so it's probably wrong.
// #define IT8671F_FDC 0x00 /* Floppy */
// #define IT8671F_PP 0x01 /* Parallel port */
/* TODO: Find datasheet and check for correct values. */
#define IT8671F_FDC 0x00 /* Floppy */
/* #define IT8671F_PP 0x01 */ /* Parallel port */
#define IT8671F_SP2 0x02 /* Com2 */
#define IT8671F_SP1 0x03 /* Com1 */
// #define IT8671F_SWC 0x04
// #define IT8671F_KBCM 0x05 /* Mouse */
#define IT8671F_KBCK 0x06 /* Keyboard */
// #define IT8671F_GPIO 0x07
// #define IT8671F_ACB 0x08
// #define IT8671F_FSCM 0x09
// #define IT8671F_WDT 0x0A
// #define IT8671F_GMP 0x0B
// #define IT8671F_MIDI 0x0C
// #define IT8671F_VLM 0x0D
// #define IT8671F_TMS 0x0E
/* #define IT8671F_FAN 0x09 */

72
src/superio/ite/it8671f/it8671f_early_serial.c
View File

@ -19,11 +19,73 @@
#include <arch/romcc_io.h>
#include "it8671f.h"
static void it8671f_enable_serial(device_t dev, unsigned iobase)
/* The base address is 0x3f0, 0x3bd, or 0x370, depending on config bytes. */
#define SIO_BASE 0x3f0
#define SIO_INDEX SIO_BASE
#define SIO_DATA SIO_BASE+1
/* TODO: These values are actually from the IT8673F datasheet; check if
they're also valid for the IT8671F. */
#define IT8671F_CONFIG_REG_CC 0x02 /* Configure Control. */
#define IT8671F_CONFIG_REG_LDN 0x07 /* Logical Device Number. */
#define IT8671F_CONFIG_REG_CLOCKSEL 0x23 /* Clock Selection. */
#define IT8671F_CONFIG_REG_SWSUSP 0x24 /* Software Suspend. */
#define IT8671F_ADDRESS_PORT 0x279
/* Special values used for entering MB PnP mode. The first four bytes of
* each line determine the address port, the last four are data. */
static const uint8_t init_values[] = {
0x6a, 0xb5, 0xda, 0xed, /**/ 0xf6, 0xfb, 0x7d, 0xbe,
0xdf, 0x6f, 0x37, 0x1b, /**/ 0x0d, 0x86, 0xc3, 0x61,
0xb0, 0x58, 0x2c, 0x16, /**/ 0x8b, 0x45, 0xa2, 0xd1,
0xe8, 0x74, 0x3a, 0x9d, /**/ 0xce, 0xe7, 0x73, 0x39,
};
/* The content of IT8671F_CONFIG_REG_LDN (index 07h) must be set to the
* LDN the register belongs to, before you can access the register. */
static void it8671f_sio_write(uint8_t ldn, uint8_t index, uint8_t value)
{
pnp_set_logical_device(dev);
pnp_set_enable(dev, 1);
pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
pnp_set_enable(dev, 1);
outb(IT8671F_CONFIG_REG_LDN, SIO_BASE);
outb(ldn, SIO_DATA);
outb(index, SIO_BASE);
outb(value, SIO_DATA);
}
/* Enable the peripheral devices on the IT8671F Super IO chip. */
static void it8671f_enable_serial(device_t dev, unsigned iobase)
{
uint8_t i;
/* (1) Enter the configuration state (MB PnP mode). */
/* Perform MB PnP setup to put the SIO chip at 0x3f0. */
/* Base address 0x3f0: 0x86 0x80 0x55 0x55. */
/* Base address 0x3bd: 0x86 0x80 0x55 0xaa. */
/* Base address 0x370: 0x86 0x80 0xaa 0x55. */
outb(0x86, IT8671F_ADDRESS_PORT);
outb(0x80, IT8671F_ADDRESS_PORT);
outb(0x55, IT8671F_ADDRESS_PORT);
outb(0x55, IT8671F_ADDRESS_PORT);
/* Sequentially write the 32 special values. */
for (i = 0; i < 32; i++) {
outb(init_values[i], SIO_BASE);
}
/* (2) Modify the data of configuration registers. */
/* Enable parallel port, serial port 1, serial port 2, floppy. */
it8671f_sio_write(0x00, 0x23, 0x0f);
/* Activate serial port 1 and 2. */
it8671f_sio_write(0x01, 0x30, 0x1);
it8671f_sio_write(0x02, 0x30, 0x1);
/* Select 24MHz CLKIN and clear software suspend mode. */
it8671f_sio_write(0x00, IT8671F_CONFIG_REG_SWSUSP, 0x00);
/* (3) Exit the configuration state (MB PnP mode). */
it8671f_sio_write(0x00, IT8671F_CONFIG_REG_CC, 0x02);
}

24
src/superio/ite/it8671f/superio.c
View File

@ -16,12 +16,6 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
// #include <arch/io.h>
// #include <device/device.h>
// #include <device/pnp.h>
// #include <console/console.h>
// #include <string.h>
// #include <bitops.h>
#include <uart8250.h>
#include <pc80/keyboard.h>
#include "chip.h"
@ -38,7 +32,10 @@ static void init(device_t dev)
conf = dev->chip_info;
switch(dev->path.u.pnp.device) {
switch (dev->path.u.pnp.device) {
case IT8671F_FDC:
/* TODO. */
break;
case IT8671F_SP1:
res0 = find_resource(dev, PNP_IDX_IO0);
init_uart8250(res0->base, &conf->com1);
@ -63,18 +60,13 @@ static struct device_operations ops = {
.init = init,
};
// TODO.
/* TODO: Find and check datasheet. */
static struct pnp_info pnp_dev_info[] = {
// { &ops, IT8671F_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, },
// { &ops, IT8671F_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x04f8, 0}, },
{ &ops, IT8671F_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, },
/* { &ops, IT8671F_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x04f8, 0}, }, */
{ &ops, IT8671F_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, },
{ &ops, IT8671F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
// { &ops, IT8671F_SWC, PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 }, },
// { &ops, IT8671F_KBCM, PNP_IRQ0 },
{ &ops, IT8671F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
// { &ops, IT8671F_GPIO, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
// { &ops, IT8671F_XBUS, PNP_IO0 | PNP_IRQ0, { 0xffe0, 0 } },
// { &ops, IT8671F_RTC, PNP_IO0 | PNP_IO1, { 0xfffe, 0 }, {0xfffe, 0x4} },
{ &ops, IT8671F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
};
static void enable_dev(struct device *dev)