mb/google/hatch/vr/puff: Add psys_pmax calculation
This patch adds psys_pmax calculation. There are two types of power sources. One is barrel jack and the other is USB TYPE-C. The voltage level is fixed for a barrel jack while TYPE-C may vary depending on power ratings. We need to get voltage information from EC and calculate correct psys_pmax value. The psys_pmax needs to be set before FSP-S since FSP-S will handle the setting passing to pcode, so move the routine ahead to variant_ramstage_init. BUG=b:151972149 TEST=emerge-puff coreboot chromeos-bootimage check firmware log and ensure psys_pmax is passed to FSP check the data from dump_intel_rapl_consumption in the OS and ensure the power data is close to an external power meter. Change-Id: Iff767d4b44a01e766258345545438a54a16d1af5 Signed-off-by: Tim Chen <tim-chen@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40828 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
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@ -31,23 +31,6 @@ static void wait_for_hpd(gpio_t gpio, long timeout)
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stopwatch_duration_msecs(&sw));
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stopwatch_duration_msecs(&sw));
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}
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}
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void variant_ramstage_init(void)
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{
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static const long display_timeout_ms = 3000;
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/* This is reconfigured back to whatever FSP-S expects by
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gpio_configure_pads. */
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gpio_input(GPIO_HDMI_HPD);
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gpio_input(GPIO_DP_HPD);
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if (display_init_required()
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&& !gpio_get(GPIO_HDMI_HPD)
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&& !gpio_get(GPIO_DP_HPD)) {
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/* This has to be done before FSP-S runs. */
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if (google_chromeec_wait_for_displayport(display_timeout_ms))
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wait_for_hpd(GPIO_DP_HPD, display_timeout_ms);
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}
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}
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/*
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/*
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* For type-C chargers, set PL2 to 90% of max power to account for
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* For type-C chargers, set PL2 to 90% of max power to account for
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* cable loss and FET Rdson loss in the path from the source.
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* cable loss and FET Rdson loss in the path from the source.
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@ -86,6 +69,24 @@ void variant_ramstage_init(void)
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* | n (U22) | 29 | .9n | .9n | x(43) |
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* | n (U22) | 29 | .9n | .9n | x(43) |
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* +-------------+-----+---------+---------+-------+
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* +-------------+-----+---------+---------+-------+
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*/
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*/
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/*
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* Psys_pmax considerations
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*
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* Given the hardware design in puff, the serial shunt resistor is 0.01ohm.
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* The full scale of hardware PSYS signal 0.8v maps to system current 9.6A
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* instead of real system power. The equation is shown below:
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* PSYS = 0.8v = (0.01ohm x Iinput) x 50 (INA213, gain 50V/V) x 15k/(15k + 75k)
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* Hence, Iinput (Amps) = 9.6A
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* Since there is no voltage information from PSYS, different voltage input
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* would map to different Psys_pmax settings:
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* For Type-C 15V, the Psys_pmax sholud be 15v x 9.6A = 144W
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* For Type-C 20V, the Psys_pmax should be 20v x 9.6A = 192W
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* For a barral jack, the Psys_pmax should be 19v x 9.6A = 182.4W
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*/
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#define PSYS_IMAX 9600
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#define BJ_VOLTS_MV 19000
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static void mainboard_set_power_limits(config_t *conf)
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static void mainboard_set_power_limits(config_t *conf)
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{
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{
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enum usb_chg_type type;
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enum usb_chg_type type;
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@ -108,15 +109,33 @@ static void mainboard_set_power_limits(config_t *conf)
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/* set minimum duty cycle */
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/* set minimum duty cycle */
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conf->tdp_psyspl3_dutycycle = PUFF_MIN_DUTYCYCLE;
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conf->tdp_psyspl3_dutycycle = PUFF_MIN_DUTYCYCLE;
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conf->tdp_pl4 = SET_PSYSPL2(psyspl2);
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conf->tdp_pl4 = SET_PSYSPL2(psyspl2);
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} else {
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/* Input type is barrel jack */
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volts_mv = BJ_VOLTS_MV;
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}
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}
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/* voltage unit is milliVolts and current is in milliAmps */
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conf->psys_pmax = (u16)(((u32)PSYS_IMAX * volts_mv) / 1000000);
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conf->tdp_pl2_override = PUFF_PL2;
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conf->tdp_pl2_override = PUFF_PL2;
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/* set psyspl2 to 90% of max adapter power */
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/* set psyspl2 to 90% of max adapter power */
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conf->tdp_psyspl2 = SET_PSYSPL2(psyspl2);
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conf->tdp_psyspl2 = SET_PSYSPL2(psyspl2);
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}
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}
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void variant_mainboard_enable(struct device *dev)
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void variant_ramstage_init(void)
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{
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{
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static const long display_timeout_ms = 3000;
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config_t *conf = config_of_soc();
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config_t *conf = config_of_soc();
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/* This is reconfigured back to whatever FSP-S expects by gpio_configure_pads. */
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gpio_input(GPIO_HDMI_HPD);
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gpio_input(GPIO_DP_HPD);
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if (display_init_required()
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&& !gpio_get(GPIO_HDMI_HPD)
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&& !gpio_get(GPIO_DP_HPD)) {
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/* This has to be done before FSP-S runs. */
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if (google_chromeec_wait_for_displayport(display_timeout_ms))
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wait_for_hpd(GPIO_DP_HPD, display_timeout_ms);
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}
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/* Psys_pmax needs to be setup before FSP-S */
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mainboard_set_power_limits(conf);
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mainboard_set_power_limits(conf);
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}
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}
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@ -31,23 +31,6 @@ static void wait_for_hpd(gpio_t gpio, long timeout)
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stopwatch_duration_msecs(&sw));
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stopwatch_duration_msecs(&sw));
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}
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}
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void variant_ramstage_init(void)
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{
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static const long display_timeout_ms = 3000;
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/* This is reconfigured back to whatever FSP-S expects by
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gpio_configure_pads. */
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gpio_input(GPIO_HDMI_HPD);
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gpio_input(GPIO_DP_HPD);
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if (display_init_required()
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&& !gpio_get(GPIO_HDMI_HPD)
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&& !gpio_get(GPIO_DP_HPD)) {
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/* This has to be done before FSP-S runs. */
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if (google_chromeec_wait_for_displayport(display_timeout_ms))
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wait_for_hpd(GPIO_DP_HPD, display_timeout_ms);
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}
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}
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/*
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/*
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* For type-C chargers, set PL2 to 90% of max power to account for
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* For type-C chargers, set PL2 to 90% of max power to account for
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* cable loss and FET Rdson loss in the path from the source.
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* cable loss and FET Rdson loss in the path from the source.
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@ -86,6 +69,24 @@ void variant_ramstage_init(void)
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* | n (U22) | 29 | .9n | .9n | x(43) |
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* | n (U22) | 29 | .9n | .9n | x(43) |
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* +-------------+-----+---------+---------+-------+
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* +-------------+-----+---------+---------+-------+
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*/
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*/
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/*
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* Psys_pmax considerations
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*
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* Given the hardware design in puff, the serial shunt resistor is 0.01ohm.
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* The full scale of hardware PSYS signal 0.8v maps to system current 9.6A
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* instead of real system power. The equation is shown below:
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* PSYS = 0.8v = (0.01ohm x Iinput) x 50 (INA213, gain 50V/V) x 15k/(15k + 75k)
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* Hence, Iinput (Amps) = 9.6A
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* Since there is no voltage information from PSYS, different voltage input
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* would map to different Psys_pmax settings:
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* For Type-C 15V, the Psys_pmax sholud be 15v x 9.6A = 144W
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* For Type-C 20V, the Psys_pmax should be 20v x 9.6A = 192W
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* For a barral jack, the Psys_pmax should be 19v x 9.6A = 182.4W
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*/
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#define PSYS_IMAX 9600
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#define BJ_VOLTS_MV 19000
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static void mainboard_set_power_limits(config_t *conf)
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static void mainboard_set_power_limits(config_t *conf)
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{
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{
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enum usb_chg_type type;
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enum usb_chg_type type;
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@ -108,15 +109,33 @@ static void mainboard_set_power_limits(config_t *conf)
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/* set minimum duty cycle */
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/* set minimum duty cycle */
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conf->tdp_psyspl3_dutycycle = PUFF_MIN_DUTYCYCLE;
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conf->tdp_psyspl3_dutycycle = PUFF_MIN_DUTYCYCLE;
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conf->tdp_pl4 = SET_PSYSPL2(psyspl2);
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conf->tdp_pl4 = SET_PSYSPL2(psyspl2);
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} else {
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/* Input type is barrel jack */
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volts_mv = BJ_VOLTS_MV;
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}
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}
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/* voltage unit is milliVolts and current is in milliAmps */
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conf->psys_pmax = (u16)(((u32)PSYS_IMAX * volts_mv) / 1000000);
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conf->tdp_pl2_override = PUFF_PL2;
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conf->tdp_pl2_override = PUFF_PL2;
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/* set psyspl2 to 90% of max adapter power */
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/* set psyspl2 to 90% of max adapter power */
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conf->tdp_psyspl2 = SET_PSYSPL2(psyspl2);
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conf->tdp_psyspl2 = SET_PSYSPL2(psyspl2);
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}
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}
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void variant_mainboard_enable(struct device *dev)
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void variant_ramstage_init(void)
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{
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{
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static const long display_timeout_ms = 3000;
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config_t *conf = config_of_soc();
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config_t *conf = config_of_soc();
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/* This is reconfigured back to whatever FSP-S expects by gpio_configure_pads. */
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gpio_input(GPIO_HDMI_HPD);
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gpio_input(GPIO_DP_HPD);
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if (display_init_required()
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&& !gpio_get(GPIO_HDMI_HPD)
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&& !gpio_get(GPIO_DP_HPD)) {
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/* This has to be done before FSP-S runs. */
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if (google_chromeec_wait_for_displayport(display_timeout_ms))
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wait_for_hpd(GPIO_DP_HPD, display_timeout_ms);
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}
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/* Psys_pmax needs to be setup before FSP-S */
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mainboard_set_power_limits(conf);
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mainboard_set_power_limits(conf);
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}
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}
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