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sb/intel/common/smihandler: Hook up smmstore 

TESTED on Asus P5QC.

Change-Id: I20b87f3dcb898656ad31478820dd5153e4053cb2
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/30012
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Arthur Heymans 2018-12-03 01:28:18 +01:00 committed by Patrick Georgi
parent 6238563b2b
commit 4c80425f30
2 changed files with 26 additions and 0 deletions
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1
src/southbridge/intel/common/Kconfig
View File

@ -20,6 +20,7 @@ config SOUTHBRIDGE_INTEL_COMMON_SMBUS
config SOUTHBRIDGE_INTEL_COMMON_SPI config SOUTHBRIDGE_INTEL_COMMON_SPI
def_bool n def_bool n
select SPI_FLASH select SPI_FLASH
select BOOT_DEVICE_SUPPORTS_WRITES
config SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN config SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN
def_bool n def_bool n

25
src/southbridge/intel/common/smihandler.c
View File

@ -27,6 +27,7 @@
#include <halt.h> #include <halt.h>
#include <pc80/mc146818rtc.h> #include <pc80/mc146818rtc.h>
#include <southbridge/intel/common/pmbase.h> #include <southbridge/intel/common/pmbase.h>
#include <smmstore.h>
#include "pmutil.h" #include "pmutil.h"
@ -268,6 +269,26 @@ static void southbridge_smi_gsmi(void)
} }
#endif #endif
static void southbridge_smi_store(void)
{
u8 sub_command, ret;
em64t101_smm_state_save_area_t *io_smi =
smi_apmc_find_state_save(APM_CNT_SMMSTORE);
uint32_t reg_ebx;
if (!io_smi)
return;
/* Command and return value in EAX */
sub_command = (io_smi->rax >> 8) & 0xff;
/* Parameter buffer in EBX */
reg_ebx = io_smi->rbx;
/* drivers/smmstore/smi.c */
ret = smmstore_exec(sub_command, (uintptr_t *)reg_ebx);
io_smi->rax = ret;
}
static int mainboard_finalized = 0; static int mainboard_finalized = 0;
static void southbridge_smi_apmc(void) static void southbridge_smi_apmc(void)
@ -322,6 +343,10 @@ static void southbridge_smi_apmc(void)
southbridge_smi_gsmi(); southbridge_smi_gsmi();
break; break;
#endif #endif
case APM_CNT_SMMSTORE:
if (CONFIG(SMMSTORE))
southbridge_smi_store();
break;
} }
mainboard_smi_apmc(reg8); mainboard_smi_apmc(reg8);