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soc/intel/apollolake: Limit xDCI feature when VBOOT is enabled 

Use the common xDCI function to check if the controller is allowed
in the current mode before enabling it.  Otherwise, disable the
PCI device if it has been enabled in devicetree.

Change-Id: I5aea15511c52d1191babf551feb237f4144683e4
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/25364
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Duncan Laurie 2018-03-26 02:19:58 -07:00 committed by Patrick Georgi
parent 4df7d2c495
commit 4c8fbc0658
2 changed files with 8 additions and 1 deletions
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7
src/soc/intel/apollolake/chip.c
View File

@ -30,6 +30,7 @@
#include <intelblocks/fast_spi.h>
#include <intelblocks/p2sb.h>
#include <intelblocks/msr.h>
#include <intelblocks/xdci.h>
#include <fsp/api.h>
#include <fsp/util.h>
#include <intelblocks/cpulib.h>
@ -585,6 +586,12 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd)
glk_fsp_silicon_init_params_cb(cfg, silconfig);
else
apl_fsp_silicon_init_params_cb(cfg, silconfig);
/* Enable xDCI controller if enabled in devicetree and allowed */
dev = dev_find_slot(0, PCH_DEVFN_XDCI);
if (!xdci_can_enable())
dev->enabled = 0;
silconfig->UsbOtg = dev->enabled;
}
struct chip_operations soc_intel_apollolake_ops = {

2
src/soc/intel/apollolake/xdci.c
View File

@ -54,7 +54,7 @@ static void configure_host_mode_port0(struct device *dev)
* enabled. If it's disabled assume the switch was already done
* in FSP.
*/
if (!dev->enabled || !xdci_dev->enabled)
if (!dev->enabled || !xdci_dev->enabled || !xdci_can_enable())
return;
printk(BIOS_INFO, "Putting port 0 into host mode.\n");