superio: fix and extend pnp_info of wpcd376i
The implementation of wpcd376i in coreboot is based on the superiotool output which apparently was incorrect. This patch refines the implementation to match the datasheet. Change-Id: I0108e912dc4f603276074f0999c6d3146c3b13f9 Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at> Reviewed-on: https://review.coreboot.org/27857 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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@ -30,16 +30,6 @@ static void init(struct device *dev)
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return;
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return;
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switch (dev->path.pnp.device) {
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switch (dev->path.pnp.device) {
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case WPCD376I_FDC:
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case WPCD376I_LPT:
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case WPCD376I_IR:
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case WPCD376I_SP1:
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case WPCD376I_SWC:
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case WPCD376I_KBCM:
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case WPCD376I_GPIO:
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break;
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case WPCD376I_KBCK:
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case WPCD376I_KBCK:
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pc_keyboard_init(NO_AUX_DEVICE);
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pc_keyboard_init(NO_AUX_DEVICE);
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break;
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break;
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@ -55,14 +45,33 @@ static struct device_operations ops = {
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};
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};
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static struct pnp_info pnp_dev_info[] = {
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static struct pnp_info pnp_dev_info[] = {
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{ NULL, WPCD376I_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07fa, },
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{ NULL, WPCD376I_FDC,
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{ NULL, WPCD376I_LPT, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x04f8, },
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PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_MSC0 | PNP_MSC1 | PNP_MSC8,
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{ NULL, WPCD376I_IR, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1,
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0x07f8, },
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0x07f8, },
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{ NULL, WPCD376I_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
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{ NULL, WPCD376I_LPT,
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{ NULL, WPCD376I_KBCM, PNP_IRQ0, },
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PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_MSC0 | PNP_MSC8,
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{ NULL, WPCD376I_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x07f8, 0x07f8, },
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0x03f8, },
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{ NULL, WPCD376I_GPIO, PNP_IO0 | PNP_IRQ0, 0xfff8, },
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{ NULL, WPCD376I_SP1,
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PNP_IO0 | PNP_IRQ0 | PNP_MSC0,
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0x07f8, },
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{ NULL, WPCD376I_SWC,
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PNP_IO0 | PNP_IO1 | PNP_IRQ0,
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0xfff0, 0xfff0, },
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{ NULL, WPCD376I_KBCM,
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PNP_IRQ0, },
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{ NULL, WPCD376I_KBCK,
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PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_MSC0,
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0x07f8, 0x07f8, },
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{ NULL, WPCD376I_GPIO,
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PNP_IO0 | PNP_IRQ0 | PNP_MSC0 | PNP_MSC1 | PNP_MSC2 | PNP_MSC3 |
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PNP_MSC8,
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0xffe0, },
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{ NULL, WPCD376I_ECIR,
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PNP_IO0 | PNP_IO1 | PNP_IRQ0,
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0xfff0, 0xfff0, },
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{ NULL, WPCD376I_IR,
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PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1 | PNP_MSC0,
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0xfff8, },
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};
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};
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static void enable_dev(struct device *dev)
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static void enable_dev(struct device *dev)
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@ -21,14 +21,16 @@
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#include <arch/io.h>
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#include <arch/io.h>
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/* Logical Device Numbers (LDN). */
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/* Logical Device Numbers (LDN). */
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#define WPCD376I_FDC 0 /* Floppy */
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#define WPCD376I_FDC 0x00 /* Floppy */
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#define WPCD376I_LPT 1 /* Parallel port */
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#define WPCD376I_LPT 0x01 /* Parallel port */
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#define WPCD376I_IR 2 /* Infrared port */
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/* 0x02 Undefined */
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#define WPCD376I_SP1 3 /* UART1 */
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#define WPCD376I_SP1 0x03 /* UART1 */
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#define WPCD376I_SWC 4 /* System wake-up control */
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#define WPCD376I_SWC 0x04 /* System wake-up control */
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#define WPCD376I_KBCM 5 /* PS/2 mouse */
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#define WPCD376I_KBCM 0x05 /* PS/2 mouse */
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#define WPCD376I_KBCK 6 /* PS/2 keyboard */
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#define WPCD376I_KBCK 0x06 /* PS/2 keyboard */
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#define WPCD376I_GPIO 7 /* General Purpose I/O */
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#define WPCD376I_GPIO 0x07 /* General Purpose I/O */
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#define WPCD376I_ECIR 0x15 /* Enhanced Consumer Infrared Functions (ECIR) */
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#define WPCD376I_IR 0x16 /* UART3 & Infrared port */
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void wpcd376i_enable_serial(pnp_devfn_t dev, u16 iobase);
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void wpcd376i_enable_serial(pnp_devfn_t dev, u16 iobase);
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