Rework ACPI CST table generation
... in order to unify the Sandybridge and Lenovo implementations currently used in the tree. - use acpi_addr_t in acpigen_write_register() - use acpi_cstate_t for cstate tables (and fix up the x60 and t60) - drop cst_entry from acpigen.h Change-Id: Icb87418d44d355f607c4a67300107b40f40b3b3f Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/943 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
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@ -374,7 +374,7 @@ int acpigen_write_PSD_package(u32 domain, u32 numprocs, PSD_coord coordtype)
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return len + lenh;
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}
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static int acpigen_write_CST_package_entry(struct cst_entry *entry)
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static int acpigen_write_CST_package_entry(acpi_cstate_t *cstate)
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{
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int len, len0;
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char *start, *end;
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@ -382,19 +382,19 @@ static int acpigen_write_CST_package_entry(struct cst_entry *entry)
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len0 = acpigen_write_package(4);
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len = acpigen_write_resourcetemplate_header();
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start = acpigen_get_current();
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acpigen_write_register(entry->type, entry->width, entry->offset, entry->addrsize, entry->address);
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acpigen_write_register(&cstate->resource);
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end = acpigen_get_current();
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len += end - start;
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len += acpigen_write_resourcetemplate_footer(len);
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len += len0;
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len += acpigen_write_dword(entry->ctype);
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len += acpigen_write_dword(entry->latency);
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len += acpigen_write_dword(entry->power);
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len += acpigen_write_dword(cstate->ctype);
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len += acpigen_write_dword(cstate->latency);
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len += acpigen_write_dword(cstate->power);
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acpigen_patch_len(len - 1);
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return len;
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}
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int acpigen_write_CST_package(struct cst_entry *entry, int nentries)
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int acpigen_write_CST_package(acpi_cstate_t *cstate, int nentries)
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{
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int len, lenh, lenp, i;
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lenh = acpigen_write_name("_CST");
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@ -402,7 +402,7 @@ int acpigen_write_CST_package(struct cst_entry *entry, int nentries)
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len = acpigen_write_dword(nentries);
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for (i = 0; i < nentries; i++)
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len += acpigen_write_CST_package_entry(entry + i);
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len += acpigen_write_CST_package_entry(cstate + i);
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len += lenp;
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acpigen_patch_len(len - 1);
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@ -434,25 +434,23 @@ int acpigen_write_mem32fixed(int readwrite, u32 base, u32 size)
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return 12;
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}
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int acpigen_write_register(int type, int width, int offset, int addrsize, u64 address)
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int acpigen_write_register(acpi_addr_t *addr)
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{
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acpigen_emit_byte(0x82);
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/* Byte 1+2: length (0x000c) */
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acpigen_emit_byte(0x0c);
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acpigen_emit_byte(0x00);
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/* bit1-7 are ignored */
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acpigen_emit_byte(type); /* FFixedHW */
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acpigen_emit_byte(width); /* register width */
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acpigen_emit_byte(offset); /* register offset */
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acpigen_emit_byte(addrsize); /* register address size */
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acpigen_emit_byte(address & 0xff); /* register address 0-7 */
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acpigen_emit_byte((address >> 8) & 0xff); /* register address 8-15 */
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acpigen_emit_byte((address >> 16) & 0xff); /* register address 16-23 */
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acpigen_emit_byte((address >> 24) & 0xff); /* register address 24-31 */
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acpigen_emit_byte((address >> 32) & 0xff); /* register address 32-39 */
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acpigen_emit_byte((address >> 40) & 0xff); /* register address 40-47 */
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acpigen_emit_byte((address >> 48) & 0xff); /* register address 48-55 */
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acpigen_emit_byte((address >> 56) & 0xff); /* register address 56-63 */
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acpigen_emit_byte(0x82); /* Register Descriptor */
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acpigen_emit_byte(0x0c); /* Register Length 7:0 */
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acpigen_emit_byte(0x00); /* Register Length 15:8 */
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acpigen_emit_byte(addr->space_id); /* Address Space ID */
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acpigen_emit_byte(addr->bit_width); /* Register Bit Width */
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acpigen_emit_byte(addr->bit_offset); /* Register Bit Offset */
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acpigen_emit_byte(addr->resv); /* Register Access Size */
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acpigen_emit_byte(addr->addrl & 0xff); /* Register Address Low */
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acpigen_emit_byte((addr->addrl >> 8) & 0xff);
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acpigen_emit_byte((addr->addrl >> 16) & 0xff);
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acpigen_emit_byte((addr->addrl >> 24) & 0xff);
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acpigen_emit_byte(addr->addrh & 0xff); /* Register Address High */
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acpigen_emit_byte((addr->addrh >> 8) & 0xff);
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acpigen_emit_byte((addr->addrh >> 16) & 0xff);
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acpigen_emit_byte((addr->addrh >> 24) & 0xff);
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return 15;
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}
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@ -411,6 +411,13 @@ typedef struct acpi_hest_hen {
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u32 error_threshold_win;
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} __attribute__ ((packed)) acpi_hest_hen_t;
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typedef struct acpi_cstate {
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u8 ctype;
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u16 latency;
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u32 power;
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acpi_addr_t resource;
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} __attribute__ ((packed)) acpi_cstate_t;
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/* These are implemented by the target port or north/southbridge. */
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unsigned long write_acpi_tables(unsigned long addr);
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unsigned long acpi_fill_madt(unsigned long current);
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@ -23,17 +23,7 @@
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#include <assert.h>
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#include <stdlib.h>
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#include <stdint.h>
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struct cst_entry {
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int type;
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int width;
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int offset;
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int addrsize;
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u64 address;
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int ctype;
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int latency;
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int power;
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};
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#include <arch/acpi.h>
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int acpigen_write_len_f(void);
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void acpigen_patch_len(int len);
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@ -57,16 +47,16 @@ int acpigen_write_PSS_package(u32 coreFreq, u32 power, u32 transLat, u32 busmLat
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u32 control, u32 status);
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typedef enum { SW_ALL=0xfc, SW_ANY=0xfd, HW_ALL=0xfe } PSD_coord;
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int acpigen_write_PSD_package(u32 domain, u32 numprocs, PSD_coord coordtype);
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int acpigen_write_CST_package(struct cst_entry *entry, int nentries);
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int acpigen_write_CST_package(acpi_cstate_t *entry, int nentries);
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int acpigen_write_processor(u8 cpuindex, u32 pblock_addr, u8 pblock_len);
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int acpigen_write_mem32fixed(int readwrite, u32 base, u32 size);
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int acpigen_write_io16(u16 min, u16 max, u8 align, u8 len, u8 decode16);
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int acpigen_write_register(int type, int width, int offset, int addrsize, u64 address);
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int acpigen_write_register(acpi_addr_t *addr);
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int acpigen_write_resourcetemplate_header(void);
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int acpigen_write_resourcetemplate_footer(int len);
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int acpigen_write_mainboard_resource_template(void);
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int acpigen_write_mainboard_resources(const char *scope, const char *name);
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int get_cst_entries(struct cst_entry **);
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int get_cst_entries(acpi_cstate_t **);
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#endif
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@ -3,4 +3,4 @@ driver-y += model_fxx_init.c
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ramstage-y += apic_timer.c
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ramstage-y += model_fxx_update_microcode.c
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ramstage-y += processor_name.c
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ramstage-y += powernow_acpi.c
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ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += powernow_acpi.c
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@ -62,7 +62,7 @@ static int get_fsb(void)
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return 200;
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}
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int __attribute__((weak)) get_cst_entries(struct cst_entry **entries __attribute__((unused)))
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int __attribute__((weak)) get_cst_entries(acpi_cstate_t **entries __attribute__((unused)))
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{
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return 0;
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}
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@ -76,7 +76,7 @@ void generate_cpu_entries(void)
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int cores_per_package = (cpuid_ebx(1)>>16) & 0xff;
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int numcpus = totalcores/cores_per_package; // this assumes that all CPUs share the same layout
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int count;
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struct cst_entry *cst_entries;
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acpi_cstate_t *cst_entries;
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printk(BIOS_DEBUG, "Found %d CPU(s) with %d core(s) each.\n", numcpus, cores_per_package);
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@ -37,13 +37,13 @@
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#include <pc80/mc146818rtc.h>
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#include <arch/x86/include/arch/acpigen.h>
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static struct cst_entry cst_entries[] = {
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{ 0x7f, 1, 2, 0, 1, 1, 1, 1000 },
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{ 0x01, 8, 0, 0, DEFAULT_PMBASE + LV2, 2, 1, 500 },
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{ 0x01, 8, 0, 0, DEFAULT_PMBASE + LV3, 2, 17, 250 },
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static acpi_cstate_t cst_entries[] = {
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{ 1, 1, 1000, { 0x7f, 1, 2, { 0 }, 1, 0 } },
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{ 2, 1, 500, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV2, 0 } },
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{ 2, 17, 250, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV3, 0 } },
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};
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int get_cst_entries(struct cst_entry **entries)
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int get_cst_entries(acpi_cstate_t **entries)
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{
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*entries = cst_entries;
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return ARRAY_SIZE(cst_entries);
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@ -38,13 +38,13 @@
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#include "dock.h"
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#include <arch/x86/include/arch/acpigen.h>
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static struct cst_entry cst_entries[] = {
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{ 0x7f, 1, 2, 0, 1, 1, 1, 1000 },
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{ 0x01, 8, 0, 0, DEFAULT_PMBASE + LV2, 2, 1, 500 },
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{ 0x01, 8, 0, 0, DEFAULT_PMBASE + LV3, 2, 17, 250 },
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static acpi_cstate_t cst_entries[] = {
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{ 1, 1, 1000, { 0x7f, 1, 2, { 0 }, 1, 0 } },
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{ 2, 1, 500, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV2, 0 } },
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{ 2, 17, 250, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV3, 0 } },
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};
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int get_cst_entries(struct cst_entry **entries)
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int get_cst_entries(acpi_cstate_t **entries)
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{
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*entries = cst_entries;
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return ARRAY_SIZE(cst_entries);
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