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soc/amd/picasso/mca: don't do out of bounds array accesses 

The Picasso APUs advertise 23 MCA banks in the lower byte of the
IA32_MCG_CAP MSR, which is more than the 7 core MCA banks.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I3e1c8ed437820b350c78b0517e6521582002ee1e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51477
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
This commit is contained in:
Felix Held 2021-03-13 02:38:23 +01:00 committed by Marshall Dawson
parent 108a4763f0
commit 4cd9ac0a55
1 changed files with 2 additions and 1 deletions
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3
src/soc/amd/picasso/mca.c
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@ -162,7 +162,8 @@ void check_mca(void)
int core = cpuid_ebx(1) >> 24;
printk(BIOS_WARNING, "#MC Error: core %d, bank %d %s\n",
core, i, mca_bank_name[i]);
core, i,
i < ARRAY_SIZE(mca_bank_name) ? mca_bank_name[i] : "");
printk(BIOS_WARNING, " MC%d_STATUS = %08x_%08x\n",
i, mci.sts.hi, mci.sts.lo);