mb/purism/librem_skl: Drop DQ and DQS byte maps
These settings are not necessary for DDR4 and can be dropped. Change-Id: I1946be239f0c90db995a60570474039cef45cfa9 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46251 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
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@ -5,28 +5,6 @@
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#include <spd_bin.h>
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#include <spd_bin.h>
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#include <string.h>
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#include <string.h>
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static void mainboard_fill_dq_map_data(void *dq_map_ch0, void *dq_map_ch1)
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{
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/* DQ byte map */
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const u8 dq_map[2][12] = {
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{ 0x0F, 0xF0, 0x00, 0xF0, 0x0F, 0xF0,
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0x0F, 0x00, 0xFF, 0x00, 0xFF, 0x00 },
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{ 0x33, 0xCC, 0x00, 0xCC, 0x33, 0xCC,
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0x33, 0x00, 0xFF, 0x00, 0xFF, 0x00 } };
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memcpy(dq_map_ch0, dq_map[0], sizeof(dq_map[0]));
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memcpy(dq_map_ch1, dq_map[1], sizeof(dq_map[1]));
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}
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static void mainboard_fill_dqs_map_data(void *dqs_map_ch0, void *dqs_map_ch1)
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{
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/* DQS CPU<>DRAM map */
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const u8 dqs_map[2][8] = {
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{ 0, 1, 3, 2, 4, 5, 6, 7 },
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{ 1, 0, 4, 5, 2, 3, 6, 7 } };
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memcpy(dqs_map_ch0, dqs_map[0], sizeof(dqs_map[0]));
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memcpy(dqs_map_ch1, dqs_map[1], sizeof(dqs_map[1]));
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}
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static void mainboard_fill_rcomp_res_data(void *rcomp_ptr)
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static void mainboard_fill_rcomp_res_data(void *rcomp_ptr)
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{
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{
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/* Rcomp resistor */
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/* Rcomp resistor */
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@ -54,10 +32,6 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
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dump_spd_info(&blk);
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dump_spd_info(&blk);
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assert(blk.spd_array[0][0] != 0);
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assert(blk.spd_array[0][0] != 0);
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mainboard_fill_dq_map_data(&mem_cfg->DqByteMapCh0,
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&mem_cfg->DqByteMapCh1);
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mainboard_fill_dqs_map_data(&mem_cfg->DqsMapCpu2DramCh0,
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&mem_cfg->DqsMapCpu2DramCh1);
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mainboard_fill_rcomp_res_data(&mem_cfg->RcompResistor);
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mainboard_fill_rcomp_res_data(&mem_cfg->RcompResistor);
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mainboard_fill_rcomp_strength_data(&mem_cfg->RcompTarget);
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mainboard_fill_rcomp_strength_data(&mem_cfg->RcompTarget);
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