soc/intel/common/acpi: Add _PTS, _WAK methods

Change-Id: I72f894fd14bf0e333d9fda970397a3c82de598c3
Signed-off-by: Hannah Williams <hannah.williams@intel.com>
Reviewed-on: https://review.coreboot.org/15121
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/include/console/post_codes.h

@@ -244,6 +244,20 @@
  */
 #define POST_FSP_NOTIFY_BEFORE_FINALIZE		0x95
 
+/**
+ * \brief Indicate OS _PTS entry
+ *
+ * Called from _PTS asl method
+ */
+#define POST_OS_ENTER_PTS			0x96
+
+/**
+ * \brief Indicate OS _WAK entry
+ *
+ * Called from within _WAK method
+ */
+#define POST_OS_ENTER_WAKE			0x97
+
 /**
  * \brief Entry into elf boot
  *

src/soc/intel/common/acpi/platform.asl

@@ -0,0 +1,44 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007-2009 coresystems GmbH
+ * Copyright (C) 2012 Google Inc.
+ * Copyright (C) 2016 Intel Corp
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <include/console/post_codes.h>
+
+/* Port 80 POST */
+
+OperationRegion (POST, SystemIO, CONFIG_POST_IO_PORT, 1)
+Field (POST, ByteAcc, Lock, Preserve)
+{
+	DBG0, 8
+}
+
+/*
+ * The _PTS method (Prepare To Sleep) is called before the OS is
+ * entering a sleep state. The sleep state number is passed in Arg0
+ */
+
+Method (_PTS, 1)
+{
+	Store (POST_OS_ENTER_PTS, DBG0)
+}
+
+/* The _WAK method is called on system wakeup */
+
+Method (_WAK, 1)
+{
+	Store (POST_OS_ENTER_WAKE, DBG0)
+	Return (Package(){0,0})
+}