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nb/intel/x4x: Use write32p and read32p 

This removes the need for type conversions all over the place.

Change-Id: I633a453aff17f1cbbe06b60e3efb67661733d06c
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56029
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Arthur Heymans 2021-07-02 10:05:09 +02:00 committed by Patrick Georgi
parent 2aeb2a1561
commit 4d06ff0faa
3 changed files with 13 additions and 13 deletions
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20
src/northbridge/intel/x4x/dq_dqs.c
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@ -170,13 +170,13 @@ static u8 test_dq_aligned(const struct sysinfo *s, const u8 channel)
if ((count1 % 16) == 0) if ((count1 % 16) == 0)
mchbar_write32(0xf90, 1); mchbar_write32(0xf90, 1);
const u32 pattern = write_training_schedule[count1]; const u32 pattern = write_training_schedule[count1];
write32((u32 *)(uintptr_t)address + 8 * count1, pattern); write32p(address + 8 * count1, pattern);
write32((u32 *)(uintptr_t)address + 8 * count1 + 4, pattern); write32p(address + 8 * count1 + 4, pattern);
} }
const u32 good = write_training_schedule[count]; const u32 good = write_training_schedule[count];
write32(&data[0], read32((u32 *)(uintptr_t)address + 8 * count)); write32(&data[0], read32p(address + 8 * count));
write32(&data[4], read32((u32 *)(uintptr_t)address + 8 * count + 4)); write32(&data[4], read32p(address + 8 * count + 4));
FOR_EACH_BYTELANE(lane) { FOR_EACH_BYTELANE(lane) {
u8 expected = (good >> ((lane % 4) * 8)) & 0xff; u8 expected = (good >> ((lane % 4) * 8)) & 0xff;
if (data[lane] != expected) if (data[lane] != expected)
@ -353,8 +353,8 @@ static u8 test_dqs_aligned(const struct sysinfo *s, const u8 channel)
address = test_address(channel, rank); address = test_address(channel, rank);
for (i = 0; i < RT_PATTERN_SIZE; i++) { for (i = 0; i < RT_PATTERN_SIZE; i++) {
const u32 good = read_training_schedule[i]; const u32 good = read_training_schedule[i];
write32(&data[0], read32((u32 *)(uintptr_t)address + i * 8)); write32(&data[0], read32p(address + i * 8));
write32(&data[4], read32((u32 *)(uintptr_t)address + i * 8 + 4)); write32(&data[4], read32p(address + i * 8 + 4));
FOR_EACH_BYTELANE(lane) { FOR_EACH_BYTELANE(lane) {
if (data[lane] != (good & 0xff)) if (data[lane] != (good & 0xff))
@ -442,8 +442,8 @@ int do_read_training(struct sysinfo *s)
address = test_address(channel, rank); address = test_address(channel, rank);
for (i = 0; i < RT_PATTERN_SIZE; i++) { for (i = 0; i < RT_PATTERN_SIZE; i++) {
content = read_training_schedule[i]; content = read_training_schedule[i];
write32((u32 *)(uintptr_t)address + 8 * i, content); write32p(address + 8 * i, content);
write32((u32 *)(uintptr_t)address + 8 * i + 4, content); write32p(address + 8 * i + 4, content);
} }
} }
@ -617,8 +617,8 @@ static void sample_dq(const struct sysinfo *s, u8 channel, u8 rank,
memset(high_found, 0, TOTAL_BYTELANES * sizeof(high_found[0])); memset(high_found, 0, TOTAL_BYTELANES * sizeof(high_found[0]));
for (samples = 0; samples < N_SAMPLES; samples++) { for (samples = 0; samples < N_SAMPLES; samples++) {
write32((u32 *)(uintptr_t)address, 0x12341234); write32p(address, 0x12341234);
write32((u32 *)(uintptr_t)address + 4, 0x12341234); write32p(address + 4, 0x12341234);
udelay(5); udelay(5);
FOR_EACH_BYTELANE(lane) { FOR_EACH_BYTELANE(lane) {
u8 dq_high = (mchbar_read8(0x561 + 0x400 * channel u8 dq_high = (mchbar_read8(0x561 + 0x400 * channel

4
src/northbridge/intel/x4x/raminit_ddr23.c
View File

@ -1283,7 +1283,7 @@ void send_jedec_cmd(const struct sysinfo *s, u8 r, u8 ch, u8 cmd, u32 val)
} }
data32 <<= 3; data32 <<= 3;
read32((void *)(uintptr_t)(data32 | addr)); read32p(data32 | addr);
udelay(10); udelay(10);
mchbar_clrsetbits8(0x271, 0x3e, NORMALOP_CMD); mchbar_clrsetbits8(0x271, 0x3e, NORMALOP_CMD);
mchbar_clrsetbits8(0x671, 0x3e, NORMALOP_CMD); mchbar_clrsetbits8(0x671, 0x3e, NORMALOP_CMD);
@ -2090,7 +2090,7 @@ void do_raminit(struct sysinfo *s, int fast_boot)
if (s->boot_path == BOOT_PATH_NORMAL) { if (s->boot_path == BOOT_PATH_NORMAL) {
FOR_EACH_POPULATED_RANK(s->dimms, ch, r) { FOR_EACH_POPULATED_RANK(s->dimms, ch, r) {
for (bank = 0; bank < 4; bank++) for (bank = 0; bank < 4; bank++)
read32((u32 *)(uintptr_t)(test_address(ch, r) | 0x800000 | (bank << 12))); read32p(test_address(ch, r) | 0x800000 | (bank << 12));
} }
} }
printk(BIOS_DEBUG, "Done dummy reads\n"); printk(BIOS_DEBUG, "Done dummy reads\n");

2
src/northbridge/intel/x4x/rcven.c
View File

@ -38,7 +38,7 @@ static u8 sampledqs(u32 addr, u8 lane, u8 channel)
} }
mfence(); mfence();
/* Read strobe */ /* Read strobe */
read32((void *)(uintptr_t)addr); read32p(addr);
mfence(); mfence();
return mchbar_read8(sample_offset) >> 6 & 1; return mchbar_read8(sample_offset) >> 6 & 1;
} }