nb/intel/sandybridge: Add comment to TC_RWP write

Change-Id: I164daa59696f2fe8de3a4b3e7da46c7c723778eb
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48602
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/northbridge/intel/sandybridge/raminit_common.c

@@ -1885,6 +1885,10 @@ int write_training(ramctr_timing *ctrl)
 	int channel, slotrank;
 	int err;
 
+	/*
+	 * Set the DEC_WRD bit, required for the write flyby algorithm.
+	 * Needs to be done before starting the write training procedure.
+	 */
 	FOR_ALL_POPULATED_CHANNELS
 		MCHBAR32_OR(TC_RWP_ch(channel), 1 << 27);