diff --git a/src/mainboard/google/veyron_brain/Kconfig b/src/mainboard/google/veyron_brain/Kconfig
index b4d1a0773a..94f1a4b0d6 100644
--- a/src/mainboard/google/veyron_brain/Kconfig
+++ b/src/mainboard/google/veyron_brain/Kconfig
@@ -73,4 +73,8 @@ config CONSOLE_SERIAL_UART_ADDRESS
 	depends on CONSOLE_SERIAL_UART
 	default 0xFF690000
 
+config PMIC_BUS
+	int
+	default 0
+
 endif #  BOARD_GOOGLE_VEYRON_BRAIN
diff --git a/src/mainboard/google/veyron_brain/board.h b/src/mainboard/google/veyron_brain/board.h
index c9583cf30c..96159d41e8 100644
--- a/src/mainboard/google/veyron_brain/board.h
+++ b/src/mainboard/google/veyron_brain/board.h
@@ -23,8 +23,6 @@
 #include <boardid.h>
 #include <gpio.h>
 
-#define PMIC_BUS 0
-
 #define GPIO_RESET	GPIO(0, B, 5)
 
 /* TODO: move setup_chromeos_gpios() here once bootblock code is in mainboard */
diff --git a/src/mainboard/google/veyron_brain/bootblock.c b/src/mainboard/google/veyron_brain/bootblock.c
index af353f89fa..610c23e4de 100644
--- a/src/mainboard/google/veyron_brain/bootblock.c
+++ b/src/mainboard/google/veyron_brain/bootblock.c
@@ -50,12 +50,13 @@ void bootblock_mainboard_init(void)
 	/* Up VDD_CPU (BUCK1) to 1.4V to support max CPU frequency (1.8GHz). */
 	setbits_le32(&rk3288_pmu->iomux_i2c0scl, IOMUX_I2C0SCL);
 	setbits_le32(&rk3288_pmu->iomux_i2c0sda, IOMUX_I2C0SDA);
-	i2c_init(PMIC_BUS, 400*KHz);
+	assert(CONFIG_PMIC_BUS == 0);	/* must correspond with IOMUX */
+	i2c_init(CONFIG_PMIC_BUS, 400*KHz);
 
 	/* Slowly raise to max CPU voltage to prevent overshoot */
-	rk808_configure_buck(PMIC_BUS, 1, 1200);
+	rk808_configure_buck(1, 1200);
 	udelay(175);/* Must wait for voltage to stabilize,2mV/us */
-	rk808_configure_buck(PMIC_BUS, 1, 1400);
+	rk808_configure_buck(1, 1400);
 	udelay(100);/* Must wait for voltage to stabilize,2mV/us */
 	rkclk_configure_cpu();
 
diff --git a/src/mainboard/google/veyron_brain/mainboard.c b/src/mainboard/google/veyron_brain/mainboard.c
index d8719c06b4..13990d9493 100644
--- a/src/mainboard/google/veyron_brain/mainboard.c
+++ b/src/mainboard/google/veyron_brain/mainboard.c
@@ -63,7 +63,7 @@ static void configure_codec(void)
 	writel(IOMUX_I2S, &rk3288_grf->iomux_i2s);
 	writel(IOMUX_I2SCLK, &rk3288_grf->iomux_i2sclk);
 
-	rk808_configure_ldo(PMIC_BUS, 6, 1800);	/* VCC18_CODEC */
+	rk808_configure_ldo(6, 1800);	/* VCC18_CODEC */
 
 	/* AUDIO IO domain 1.8V voltage selection */
 	writel(RK_SETBITS(1 << 6), &rk3288_grf->io_vsel);
@@ -77,9 +77,9 @@ static void configure_vop(void)
 	/* lcdc(vop) iodomain select 1.8V */
 	writel(RK_SETBITS(1 << 0), &rk3288_grf->io_vsel);
 
-	rk808_configure_switch(PMIC_BUS, 2, 1);	/* VCC18_LCD (HDMI_AVDD_1V8) */
-	rk808_configure_ldo(PMIC_BUS, 7, 1000);	/* VDD10_LCD (HDMI_AVDD_1V0) */
-	rk808_configure_switch(PMIC_BUS, 1, 1);	/* VCC33_LCD */
+	rk808_configure_switch(2, 1);	/* VCC18_LCD (HDMI_AVDD_1V8) */
+	rk808_configure_ldo(7, 1000);	/* VDD10_LCD (HDMI_AVDD_1V0) */
+	rk808_configure_switch(1, 1);	/* VCC33_LCD */
 }
 
 static void mainboard_init(device_t dev)
diff --git a/src/mainboard/google/veyron_brain/romstage.c b/src/mainboard/google/veyron_brain/romstage.c
index 995609afc3..1eed268fa7 100644
--- a/src/mainboard/google/veyron_brain/romstage.c
+++ b/src/mainboard/google/veyron_brain/romstage.c
@@ -79,8 +79,8 @@ static void configure_l2ctlr(void)
 
 static void sdmmc_power_off(void)
 {
-	rk808_configure_ldo(PMIC_BUS, 4, 0); /* VCCIO_SD */
-	rk808_configure_ldo(PMIC_BUS, 5, 0); /* VCC33_SD */
+	rk808_configure_ldo(4, 0); /* VCCIO_SD */
+	rk808_configure_ldo(5, 0); /* VCC33_SD */
 }
 
 void main(void)
diff --git a/src/mainboard/google/veyron_jerry/Kconfig b/src/mainboard/google/veyron_jerry/Kconfig
index 4bf79da9f8..0eda36cc05 100644
--- a/src/mainboard/google/veyron_jerry/Kconfig
+++ b/src/mainboard/google/veyron_jerry/Kconfig
@@ -84,4 +84,8 @@ config CONSOLE_SERIAL_UART_ADDRESS
 	depends on CONSOLE_SERIAL_UART
 	default 0xFF690000
 
+config PMIC_BUS
+	int
+	default 0
+
 endif #  BOARD_GOOGLE_VEYRON_JERRY
diff --git a/src/mainboard/google/veyron_jerry/board.h b/src/mainboard/google/veyron_jerry/board.h
index 2b1643d4bd..be96ce7843 100644
--- a/src/mainboard/google/veyron_jerry/board.h
+++ b/src/mainboard/google/veyron_jerry/board.h
@@ -23,8 +23,6 @@
 #include <boardid.h>
 #include <gpio.h>
 
-#define PMIC_BUS 0
-
 #define GPIO_RESET	GPIO(0, B, 5)
 
 /* TODO: move setup_chromeos_gpios() here once bootblock code is in mainboard */
diff --git a/src/mainboard/google/veyron_jerry/bootblock.c b/src/mainboard/google/veyron_jerry/bootblock.c
index 5571d456f8..90ad744980 100644
--- a/src/mainboard/google/veyron_jerry/bootblock.c
+++ b/src/mainboard/google/veyron_jerry/bootblock.c
@@ -48,12 +48,13 @@ void bootblock_mainboard_init(void)
 	/* Up VDD_CPU (BUCK1) to 1.4V to support max CPU frequency (1.8GHz). */
 	setbits_le32(&rk3288_pmu->iomux_i2c0scl, IOMUX_I2C0SCL);
 	setbits_le32(&rk3288_pmu->iomux_i2c0sda, IOMUX_I2C0SDA);
-	i2c_init(PMIC_BUS, 400*KHz);
+	assert(CONFIG_PMIC_BUS == 0);	/* must correspond with IOMUX */
+	i2c_init(CONFIG_PMIC_BUS, 400*KHz);
 
 	/* Slowly raise to max CPU voltage to prevent overshoot */
-	rk808_configure_buck(PMIC_BUS, 1, 1200);
+	rk808_configure_buck(1, 1200);
 	udelay(175);/* Must wait for voltage to stabilize,2mV/us */
-	rk808_configure_buck(PMIC_BUS, 1, 1400);
+	rk808_configure_buck(1, 1400);
 	udelay(100);/* Must wait for voltage to stabilize,2mV/us */
 	rkclk_configure_cpu();
 
diff --git a/src/mainboard/google/veyron_jerry/mainboard.c b/src/mainboard/google/veyron_jerry/mainboard.c
index d9952605dc..198a93003d 100644
--- a/src/mainboard/google/veyron_jerry/mainboard.c
+++ b/src/mainboard/google/veyron_jerry/mainboard.c
@@ -54,8 +54,8 @@ static void configure_sdmmc(void)
 	writel(RK_CLRBITS(1 << 12), &rk3288_grf->soc_con0);
 
 	/* Note: these power rail definitions are copied in romstage.c */
-	rk808_configure_ldo(PMIC_BUS, 4, 3300); /* VCCIO_SD */
-	rk808_configure_ldo(PMIC_BUS, 5, 3300); /* VCC33_SD */
+	rk808_configure_ldo(4, 3300); /* VCCIO_SD */
+	rk808_configure_ldo(5, 3300); /* VCC33_SD */
 
 	gpio_input(GPIO(7, A, 5));		/* SD_DET */
 }
@@ -77,7 +77,7 @@ static void configure_codec(void)
 	writel(IOMUX_I2S, &rk3288_grf->iomux_i2s);
 	writel(IOMUX_I2SCLK, &rk3288_grf->iomux_i2sclk);
 
-	rk808_configure_ldo(PMIC_BUS, 6, 1800);	/* VCC18_CODEC */
+	rk808_configure_ldo(6, 1800);	/* VCC18_CODEC */
 
 	/* AUDIO IO domain 1.8V voltage selection */
 	writel(RK_SETBITS(1 << 6), &rk3288_grf->io_vsel);
@@ -93,15 +93,15 @@ static void configure_vop(void)
 
 	switch (board_id()) {
 	case 2:
-		rk808_configure_switch(PMIC_BUS, 2, 1);	/* VCC18_LCD */
-		rk808_configure_ldo(PMIC_BUS, 7, 2500);	/* VCC10_LCD_PWREN_H */
-		rk808_configure_switch(PMIC_BUS, 1, 1);	/* VCC33_LCD */
+		rk808_configure_switch(2, 1);	/* VCC18_LCD */
+		rk808_configure_ldo(7, 2500);	/* VCC10_LCD_PWREN_H */
+		rk808_configure_switch(1, 1);	/* VCC33_LCD */
 		break;
 	default:
 		gpio_output(GPIO(2, B, 5), 1);	/* AVDD_1V8_DISP_EN */
-		rk808_configure_ldo(PMIC_BUS, 7, 2500);	/* VCC10_LCD_PWREN_H */
+		rk808_configure_ldo(7, 2500);	/* VCC10_LCD_PWREN_H */
 		gpio_output(GPIO(7, B, 6), 1);	/* LCD_EN */
-		rk808_configure_switch(PMIC_BUS, 1, 1);	/* VCC33_LCD */
+		rk808_configure_switch(1, 1);	/* VCC33_LCD */
 		break;
 	}
 }
diff --git a/src/mainboard/google/veyron_jerry/romstage.c b/src/mainboard/google/veyron_jerry/romstage.c
index 995609afc3..1eed268fa7 100644
--- a/src/mainboard/google/veyron_jerry/romstage.c
+++ b/src/mainboard/google/veyron_jerry/romstage.c
@@ -79,8 +79,8 @@ static void configure_l2ctlr(void)
 
 static void sdmmc_power_off(void)
 {
-	rk808_configure_ldo(PMIC_BUS, 4, 0); /* VCCIO_SD */
-	rk808_configure_ldo(PMIC_BUS, 5, 0); /* VCC33_SD */
+	rk808_configure_ldo(4, 0); /* VCCIO_SD */
+	rk808_configure_ldo(5, 0); /* VCC33_SD */
 }
 
 void main(void)
diff --git a/src/mainboard/google/veyron_mighty/Kconfig b/src/mainboard/google/veyron_mighty/Kconfig
index 6716cbe3ad..bff499aa9d 100644
--- a/src/mainboard/google/veyron_mighty/Kconfig
+++ b/src/mainboard/google/veyron_mighty/Kconfig
@@ -84,4 +84,8 @@ config CONSOLE_SERIAL_UART_ADDRESS
 	depends on CONSOLE_SERIAL_UART
 	default 0xFF690000
 
+config PMIC_BUS
+	int
+	default 0
+
 endif #  BOARD_GOOGLE_VEYRON_MIGHTY
diff --git a/src/mainboard/google/veyron_mighty/board.h b/src/mainboard/google/veyron_mighty/board.h
index 237fc287be..249552e79d 100644
--- a/src/mainboard/google/veyron_mighty/board.h
+++ b/src/mainboard/google/veyron_mighty/board.h
@@ -23,8 +23,6 @@
 #include <boardid.h>
 #include <gpio.h>
 
-#define PMIC_BUS 0
-
 #define GPIO_RESET	GPIO(0, B, 5)
 
 /* TODO: move setup_chromeos_gpios() here once bootblock code is in mainboard */
diff --git a/src/mainboard/google/veyron_mighty/bootblock.c b/src/mainboard/google/veyron_mighty/bootblock.c
index 5571d456f8..90ad744980 100644
--- a/src/mainboard/google/veyron_mighty/bootblock.c
+++ b/src/mainboard/google/veyron_mighty/bootblock.c
@@ -48,12 +48,13 @@ void bootblock_mainboard_init(void)
 	/* Up VDD_CPU (BUCK1) to 1.4V to support max CPU frequency (1.8GHz). */
 	setbits_le32(&rk3288_pmu->iomux_i2c0scl, IOMUX_I2C0SCL);
 	setbits_le32(&rk3288_pmu->iomux_i2c0sda, IOMUX_I2C0SDA);
-	i2c_init(PMIC_BUS, 400*KHz);
+	assert(CONFIG_PMIC_BUS == 0);	/* must correspond with IOMUX */
+	i2c_init(CONFIG_PMIC_BUS, 400*KHz);
 
 	/* Slowly raise to max CPU voltage to prevent overshoot */
-	rk808_configure_buck(PMIC_BUS, 1, 1200);
+	rk808_configure_buck(1, 1200);
 	udelay(175);/* Must wait for voltage to stabilize,2mV/us */
-	rk808_configure_buck(PMIC_BUS, 1, 1400);
+	rk808_configure_buck(1, 1400);
 	udelay(100);/* Must wait for voltage to stabilize,2mV/us */
 	rkclk_configure_cpu();
 
diff --git a/src/mainboard/google/veyron_mighty/mainboard.c b/src/mainboard/google/veyron_mighty/mainboard.c
index c7d51cc948..3bf5724e37 100644
--- a/src/mainboard/google/veyron_mighty/mainboard.c
+++ b/src/mainboard/google/veyron_mighty/mainboard.c
@@ -54,8 +54,8 @@ static void configure_sdmmc(void)
 	writel(RK_CLRBITS(1 << 12), &rk3288_grf->soc_con0);
 
 	/* Note: these power rail definitions are copied in romstage.c */
-	rk808_configure_ldo(PMIC_BUS, 4, 3300); /* VCCIO_SD */
-	rk808_configure_ldo(PMIC_BUS, 5, 3300); /* VCC33_SD */
+	rk808_configure_ldo(4, 3300); /* VCCIO_SD */
+	rk808_configure_ldo(5, 3300); /* VCC33_SD */
 
 	gpio_input(GPIO(7, A, 5));		/* SD_DET */
 }
@@ -77,7 +77,7 @@ static void configure_codec(void)
 	writel(IOMUX_I2S, &rk3288_grf->iomux_i2s);
 	writel(IOMUX_I2SCLK, &rk3288_grf->iomux_i2sclk);
 
-	rk808_configure_ldo(PMIC_BUS, 6, 1800);	/* VCC18_CODEC */
+	rk808_configure_ldo(6, 1800);	/* VCC18_CODEC */
 
 	/* AUDIO IO domain 1.8V voltage selection */
 	writel(RK_SETBITS(1 << 6), &rk3288_grf->io_vsel);
@@ -93,15 +93,15 @@ static void configure_vop(void)
 
 	switch (board_id()) {
 	case 0:
-		rk808_configure_switch(PMIC_BUS, 2, 1);	/* VCC18_LCD */
-		rk808_configure_ldo(PMIC_BUS, 7, 2500);	/* VCC10_LCD_PWREN_H */
-		rk808_configure_switch(PMIC_BUS, 1, 1);	/* VCC33_LCD */
+		rk808_configure_switch(2, 1);	/* VCC18_LCD */
+		rk808_configure_ldo(7, 2500);	/* VCC10_LCD_PWREN_H */
+		rk808_configure_switch(1, 1);	/* VCC33_LCD */
 		break;
 	default:
 		gpio_output(GPIO(2, B, 5), 1);	/* AVDD_1V8_DISP_EN */
-		rk808_configure_ldo(PMIC_BUS, 7, 2500);	/* VCC10_LCD_PWREN_H */
+		rk808_configure_ldo(7, 2500);	/* VCC10_LCD_PWREN_H */
 		gpio_output(GPIO(7, B, 6), 1);	/* LCD_EN */
-		rk808_configure_switch(PMIC_BUS, 1, 1);	/* VCC33_LCD */
+		rk808_configure_switch(1, 1);	/* VCC33_LCD */
 		break;
 	}
 }
diff --git a/src/mainboard/google/veyron_mighty/romstage.c b/src/mainboard/google/veyron_mighty/romstage.c
index 995609afc3..1eed268fa7 100644
--- a/src/mainboard/google/veyron_mighty/romstage.c
+++ b/src/mainboard/google/veyron_mighty/romstage.c
@@ -79,8 +79,8 @@ static void configure_l2ctlr(void)
 
 static void sdmmc_power_off(void)
 {
-	rk808_configure_ldo(PMIC_BUS, 4, 0); /* VCCIO_SD */
-	rk808_configure_ldo(PMIC_BUS, 5, 0); /* VCC33_SD */
+	rk808_configure_ldo(4, 0); /* VCCIO_SD */
+	rk808_configure_ldo(5, 0); /* VCC33_SD */
 }
 
 void main(void)
diff --git a/src/mainboard/google/veyron_pinky/Kconfig b/src/mainboard/google/veyron_pinky/Kconfig
index e7f55a3da8..08588c8ac5 100644
--- a/src/mainboard/google/veyron_pinky/Kconfig
+++ b/src/mainboard/google/veyron_pinky/Kconfig
@@ -84,4 +84,8 @@ config CONSOLE_SERIAL_UART_ADDRESS
 	depends on CONSOLE_SERIAL_UART
 	default 0xFF690000
 
+config PMIC_BUS
+	int
+	default 0
+
 endif #  BOARD_GOOGLE_VEYRON_PINKY
diff --git a/src/mainboard/google/veyron_pinky/board.h b/src/mainboard/google/veyron_pinky/board.h
index 73eb5efc44..bf842c1cc0 100644
--- a/src/mainboard/google/veyron_pinky/board.h
+++ b/src/mainboard/google/veyron_pinky/board.h
@@ -23,8 +23,6 @@
 #include <boardid.h>
 #include <gpio.h>
 
-#define PMIC_BUS 0
-
 #define GPIO_RESET	(board_id() > 0 ? GPIO(0, B, 5) : GPIO(0, B, 2))
 
 /* TODO: move setup_chromeos_gpios() here once bootblock code is in mainboard */
diff --git a/src/mainboard/google/veyron_pinky/bootblock.c b/src/mainboard/google/veyron_pinky/bootblock.c
index 5571d456f8..90ad744980 100644
--- a/src/mainboard/google/veyron_pinky/bootblock.c
+++ b/src/mainboard/google/veyron_pinky/bootblock.c
@@ -48,12 +48,13 @@ void bootblock_mainboard_init(void)
 	/* Up VDD_CPU (BUCK1) to 1.4V to support max CPU frequency (1.8GHz). */
 	setbits_le32(&rk3288_pmu->iomux_i2c0scl, IOMUX_I2C0SCL);
 	setbits_le32(&rk3288_pmu->iomux_i2c0sda, IOMUX_I2C0SDA);
-	i2c_init(PMIC_BUS, 400*KHz);
+	assert(CONFIG_PMIC_BUS == 0);	/* must correspond with IOMUX */
+	i2c_init(CONFIG_PMIC_BUS, 400*KHz);
 
 	/* Slowly raise to max CPU voltage to prevent overshoot */
-	rk808_configure_buck(PMIC_BUS, 1, 1200);
+	rk808_configure_buck(1, 1200);
 	udelay(175);/* Must wait for voltage to stabilize,2mV/us */
-	rk808_configure_buck(PMIC_BUS, 1, 1400);
+	rk808_configure_buck(1, 1400);
 	udelay(100);/* Must wait for voltage to stabilize,2mV/us */
 	rkclk_configure_cpu();
 
diff --git a/src/mainboard/google/veyron_pinky/mainboard.c b/src/mainboard/google/veyron_pinky/mainboard.c
index 0266965753..a22ef92fb1 100644
--- a/src/mainboard/google/veyron_pinky/mainboard.c
+++ b/src/mainboard/google/veyron_pinky/mainboard.c
@@ -66,12 +66,12 @@ static void configure_sdmmc(void)
 	/* Note: these power rail definitions are copied in romstage.c */
 	switch (board_id()) {
 	case 0:
-		rk808_configure_ldo(PMIC_BUS, 8, 3300);	/* VCCIO_SD */
+		rk808_configure_ldo(8, 3300);	/* VCCIO_SD */
 		gpio_output(GPIO(7, C, 5), 1);		/* SD_EN */
 		break;
 	default:
-		rk808_configure_ldo(PMIC_BUS, 4, 3300); /* VCCIO_SD */
-		rk808_configure_ldo(PMIC_BUS, 5, 3300); /* VCC33_SD */
+		rk808_configure_ldo(4, 3300); /* VCCIO_SD */
+		rk808_configure_ldo(5, 3300); /* VCC33_SD */
 		break;
 	}
 
@@ -110,10 +110,10 @@ static void configure_codec(void)
 
 	switch (board_id()) {
 	case 0:
-		rk808_configure_ldo(PMIC_BUS, 5, 1800);	/* VCC18_CODEC */
+		rk808_configure_ldo(5, 1800);	/* VCC18_CODEC */
 		break;
 	default:
-		rk808_configure_ldo(PMIC_BUS, 6, 1800);	/* VCC18_CODEC */
+		rk808_configure_ldo(6, 1800);	/* VCC18_CODEC */
 		break;
 	}
 
@@ -131,20 +131,20 @@ static void configure_vop(void)
 
 	switch (board_id()) {
 	case 0:
-		rk808_configure_ldo(PMIC_BUS, 4, 1800); /* VCC18_LCD */
-		rk808_configure_ldo(PMIC_BUS, 6, 1000); /* VCC10_LCD */
+		rk808_configure_ldo(4, 1800); /* VCC18_LCD */
+		rk808_configure_ldo(6, 1000); /* VCC10_LCD */
 		gpio_output(GPIO(7, B, 7), 1); /* LCD_EN */
 		break;
 	case 1:
 	case 2:
-		rk808_configure_switch(PMIC_BUS, 2, 1);	/* VCC18_LCD */
-		rk808_configure_ldo(PMIC_BUS, 7, 2500);	/* VCC10_LCD_PWREN_H */
-		rk808_configure_switch(PMIC_BUS, 1, 1);	/* VCC33_LCD */
+		rk808_configure_switch(2, 1);	/* VCC18_LCD */
+		rk808_configure_ldo(7, 2500);	/* VCC10_LCD_PWREN_H */
+		rk808_configure_switch(1, 1);	/* VCC33_LCD */
 		break;
 	default:
 		gpio_output(GPIO(2, B, 5), 1);	/* AVDD_1V8_DISP_EN */
-		rk808_configure_ldo(PMIC_BUS, 7, 2500);	/* VCC10_LCD_PWREN_H */
-		rk808_configure_switch(PMIC_BUS, 1, 1);	/* VCC33_LCD */
+		rk808_configure_ldo(7, 2500);	/* VCC10_LCD_PWREN_H */
+		rk808_configure_switch(1, 1);	/* VCC33_LCD */
 		gpio_output(GPIO(7, B, 6), 1);	/* LCD_EN */
 		break;
 	}
diff --git a/src/mainboard/google/veyron_pinky/romstage.c b/src/mainboard/google/veyron_pinky/romstage.c
index da4165fa61..ba96688705 100644
--- a/src/mainboard/google/veyron_pinky/romstage.c
+++ b/src/mainboard/google/veyron_pinky/romstage.c
@@ -81,12 +81,12 @@ static void sdmmc_power_off(void)
 {
 	switch (board_id()) {
 	case 0:
-		rk808_configure_ldo(PMIC_BUS, 8, 0);	/* VCCIO_SD */
+		rk808_configure_ldo(8, 0);	/* VCCIO_SD */
 		gpio_output(GPIO(7, C, 5), 0);		/* SD_EN */
 		break;
 	default:
-		rk808_configure_ldo(PMIC_BUS, 4, 0); /* VCCIO_SD */
-		rk808_configure_ldo(PMIC_BUS, 5, 0); /* VCC33_SD */
+		rk808_configure_ldo(4, 0); /* VCCIO_SD */
+		rk808_configure_ldo(5, 0); /* VCC33_SD */
 		break;
 	}
 }
diff --git a/src/mainboard/google/veyron_speedy/Kconfig b/src/mainboard/google/veyron_speedy/Kconfig
index d5e764cc06..833d94bbd3 100644
--- a/src/mainboard/google/veyron_speedy/Kconfig
+++ b/src/mainboard/google/veyron_speedy/Kconfig
@@ -84,4 +84,8 @@ config CONSOLE_SERIAL_UART_ADDRESS
 	depends on CONSOLE_SERIAL_UART
 	default 0xFF690000
 
+config PMIC_BUS
+	int
+	default 0
+
 endif #  BOARD_GOOGLE_VEYRON_SPEEDY
diff --git a/src/mainboard/google/veyron_speedy/board.h b/src/mainboard/google/veyron_speedy/board.h
index c3d75bd0f2..244cdfb762 100644
--- a/src/mainboard/google/veyron_speedy/board.h
+++ b/src/mainboard/google/veyron_speedy/board.h
@@ -23,8 +23,6 @@
 #include <boardid.h>
 #include <gpio.h>
 
-#define PMIC_BUS 0
-
 #define GPIO_RESET	GPIO(0, B, 5)
 
 /* TODO: move setup_chromeos_gpios() here once bootblock code is in mainboard */
diff --git a/src/mainboard/google/veyron_speedy/bootblock.c b/src/mainboard/google/veyron_speedy/bootblock.c
index 5571d456f8..90ad744980 100644
--- a/src/mainboard/google/veyron_speedy/bootblock.c
+++ b/src/mainboard/google/veyron_speedy/bootblock.c
@@ -48,12 +48,13 @@ void bootblock_mainboard_init(void)
 	/* Up VDD_CPU (BUCK1) to 1.4V to support max CPU frequency (1.8GHz). */
 	setbits_le32(&rk3288_pmu->iomux_i2c0scl, IOMUX_I2C0SCL);
 	setbits_le32(&rk3288_pmu->iomux_i2c0sda, IOMUX_I2C0SDA);
-	i2c_init(PMIC_BUS, 400*KHz);
+	assert(CONFIG_PMIC_BUS == 0);	/* must correspond with IOMUX */
+	i2c_init(CONFIG_PMIC_BUS, 400*KHz);
 
 	/* Slowly raise to max CPU voltage to prevent overshoot */
-	rk808_configure_buck(PMIC_BUS, 1, 1200);
+	rk808_configure_buck(1, 1200);
 	udelay(175);/* Must wait for voltage to stabilize,2mV/us */
-	rk808_configure_buck(PMIC_BUS, 1, 1400);
+	rk808_configure_buck(1, 1400);
 	udelay(100);/* Must wait for voltage to stabilize,2mV/us */
 	rkclk_configure_cpu();
 
diff --git a/src/mainboard/google/veyron_speedy/mainboard.c b/src/mainboard/google/veyron_speedy/mainboard.c
index c7d51cc948..3bf5724e37 100644
--- a/src/mainboard/google/veyron_speedy/mainboard.c
+++ b/src/mainboard/google/veyron_speedy/mainboard.c
@@ -54,8 +54,8 @@ static void configure_sdmmc(void)
 	writel(RK_CLRBITS(1 << 12), &rk3288_grf->soc_con0);
 
 	/* Note: these power rail definitions are copied in romstage.c */
-	rk808_configure_ldo(PMIC_BUS, 4, 3300); /* VCCIO_SD */
-	rk808_configure_ldo(PMIC_BUS, 5, 3300); /* VCC33_SD */
+	rk808_configure_ldo(4, 3300); /* VCCIO_SD */
+	rk808_configure_ldo(5, 3300); /* VCC33_SD */
 
 	gpio_input(GPIO(7, A, 5));		/* SD_DET */
 }
@@ -77,7 +77,7 @@ static void configure_codec(void)
 	writel(IOMUX_I2S, &rk3288_grf->iomux_i2s);
 	writel(IOMUX_I2SCLK, &rk3288_grf->iomux_i2sclk);
 
-	rk808_configure_ldo(PMIC_BUS, 6, 1800);	/* VCC18_CODEC */
+	rk808_configure_ldo(6, 1800);	/* VCC18_CODEC */
 
 	/* AUDIO IO domain 1.8V voltage selection */
 	writel(RK_SETBITS(1 << 6), &rk3288_grf->io_vsel);
@@ -93,15 +93,15 @@ static void configure_vop(void)
 
 	switch (board_id()) {
 	case 0:
-		rk808_configure_switch(PMIC_BUS, 2, 1);	/* VCC18_LCD */
-		rk808_configure_ldo(PMIC_BUS, 7, 2500);	/* VCC10_LCD_PWREN_H */
-		rk808_configure_switch(PMIC_BUS, 1, 1);	/* VCC33_LCD */
+		rk808_configure_switch(2, 1);	/* VCC18_LCD */
+		rk808_configure_ldo(7, 2500);	/* VCC10_LCD_PWREN_H */
+		rk808_configure_switch(1, 1);	/* VCC33_LCD */
 		break;
 	default:
 		gpio_output(GPIO(2, B, 5), 1);	/* AVDD_1V8_DISP_EN */
-		rk808_configure_ldo(PMIC_BUS, 7, 2500);	/* VCC10_LCD_PWREN_H */
+		rk808_configure_ldo(7, 2500);	/* VCC10_LCD_PWREN_H */
 		gpio_output(GPIO(7, B, 6), 1);	/* LCD_EN */
-		rk808_configure_switch(PMIC_BUS, 1, 1);	/* VCC33_LCD */
+		rk808_configure_switch(1, 1);	/* VCC33_LCD */
 		break;
 	}
 }
diff --git a/src/mainboard/google/veyron_speedy/romstage.c b/src/mainboard/google/veyron_speedy/romstage.c
index 2dec53c332..c18471abe5 100644
--- a/src/mainboard/google/veyron_speedy/romstage.c
+++ b/src/mainboard/google/veyron_speedy/romstage.c
@@ -80,8 +80,8 @@ static void configure_l2ctlr(void)
 
 static void sdmmc_power_off(void)
 {
-	rk808_configure_ldo(PMIC_BUS, 4, 0); /* VCCIO_SD */
-	rk808_configure_ldo(PMIC_BUS, 5, 0); /* VCC33_SD */
+	rk808_configure_ldo(4, 0); /* VCCIO_SD */
+	rk808_configure_ldo(5, 0); /* VCC33_SD */
 }
 
 void main(void)
diff --git a/src/soc/rockchip/rk3288/Kconfig b/src/soc/rockchip/rk3288/Kconfig
index 95113f38cb..48ea7fc5d5 100644
--- a/src/soc/rockchip/rk3288/Kconfig
+++ b/src/soc/rockchip/rk3288/Kconfig
@@ -37,4 +37,8 @@ config BOOTBLOCK_CPU_INIT
 	string
 	default "soc/rockchip/rk3288/bootblock.c"
 
+config PMIC_BUS
+	int
+	default -1
+
 endif
diff --git a/src/soc/rockchip/rk3288/include/soc/rk808.h b/src/soc/rockchip/rk3288/include/soc/rk808.h
index e03ace844e..ceddc52974 100644
--- a/src/soc/rockchip/rk3288/include/soc/rk808.h
+++ b/src/soc/rockchip/rk3288/include/soc/rk808.h
@@ -20,8 +20,8 @@
 #ifndef __SOC_ROCKCHIP_RK3288_PMIC_H__
 #define __SOC_ROCKCHIP_RK3288_PMIC_H__
 
-void rk808_configure_switch(uint8_t bus, int sw, int enabled);
-void rk808_configure_ldo(uint8_t bus, int ldo, int millivolts);
-void rk808_configure_buck(uint8_t bus, int buck, int millivolts);
+void rk808_configure_switch(int sw, int enabled);
+void rk808_configure_ldo(int ldo, int millivolts);
+void rk808_configure_buck(int buck, int millivolts);
 
 #endif
diff --git a/src/soc/rockchip/rk3288/rk808.c b/src/soc/rockchip/rk3288/rk808.c
index 9713a9292f..de19a55135 100644
--- a/src/soc/rockchip/rk3288/rk808.c
+++ b/src/soc/rockchip/rk3288/rk808.c
@@ -25,36 +25,49 @@
 #include <stdint.h>
 #include <stdlib.h>
 
-#define RK808_ADDR	0x1b
+#if CONFIG_PMIC_BUS < 0
+#error "PMIC_BUS must be set in mainboard's Kconfig."
+#endif
 
-#define DCDC_EN		0x23
-#define LDO_EN		0x24
-#define BUCK1SEL	0x2f
-#define BUCK4SEL	0x38
-#define LDO_ONSEL(i)	(0x39 + 2 * i)
-#define LDO_SLPSEL(i)	(0x3a + 2 * i)
+#define RK808_ADDR		0x1b
 
-static void rk808_clrsetbits(uint8_t bus, uint8_t reg, uint8_t clr, uint8_t set)
+#define DCDC_EN			0x23
+#define LDO_EN			0x24
+#define BUCK1SEL		0x2f
+#define BUCK4SEL		0x38
+#define LDO_ONSEL(i)		(0x39 + 2 * i)
+#define LDO_SLPSEL(i)		(0x3a + 2 * i)
+
+static int rk808_read(uint8_t reg, uint8_t *value)
+{
+	return i2c_readb(CONFIG_PMIC_BUS, RK808_ADDR, reg, value);
+}
+
+static int rk808_write(uint8_t reg, uint8_t value)
+{
+	return i2c_writeb(CONFIG_PMIC_BUS, RK808_ADDR, reg, value);
+}
+
+static void rk808_clrsetbits(uint8_t reg, uint8_t clr, uint8_t set)
 {
 	uint8_t value;
 
-	if (i2c_readb(bus, RK808_ADDR, reg, &value) ||
-	    i2c_writeb(bus, RK808_ADDR, reg, (value & ~clr) | set))
+	if (rk808_read(reg, &value) || rk808_write(reg, (value & ~clr) | set))
 		printk(BIOS_ERR, "ERROR: Cannot set Rk808[%#x]!\n", reg);
 }
 
-void rk808_configure_switch(uint8_t bus, int sw, int enabled)
+void rk808_configure_switch(int sw, int enabled)
 {
 	assert(sw == 1 || sw == 2);
-	rk808_clrsetbits(bus, DCDC_EN, 1 << (sw + 4), !!enabled << (sw + 4));
+	rk808_clrsetbits(DCDC_EN, 1 << (sw + 4), !!enabled << (sw + 4));
 }
 
-void rk808_configure_ldo(uint8_t bus, int ldo, int millivolts)
+void rk808_configure_ldo(int ldo, int millivolts)
 {
 	uint8_t vsel;
 
 	if (!millivolts) {
-		rk808_clrsetbits(bus, LDO_EN, 1 << (ldo - 1), 0);
+		rk808_clrsetbits(LDO_EN, 1 << (ldo - 1), 0);
 		return;
 	}
 
@@ -77,11 +90,11 @@ void rk808_configure_ldo(uint8_t bus, int ldo, int millivolts)
 		die("Unknown LDO index!");
 	}
 
-	rk808_clrsetbits(bus, LDO_ONSEL(ldo), 0x1f, vsel);
-	rk808_clrsetbits(bus, LDO_EN, 0, 1 << (ldo - 1));
+	rk808_clrsetbits(LDO_ONSEL(ldo), 0x1f, vsel);
+	rk808_clrsetbits(LDO_EN, 0, 1 << (ldo - 1));
 }
 
-void rk808_configure_buck(uint8_t bus, int buck, int millivolts)
+void rk808_configure_buck(int buck, int millivolts)
 {
 	uint8_t vsel;
 	uint8_t buck_reg;
@@ -102,6 +115,6 @@ void rk808_configure_buck(uint8_t bus, int buck, int millivolts)
 	default:
 		die("fault buck index!");
 	}
-	rk808_clrsetbits(bus, buck_reg, 0x3f, vsel);
-	rk808_clrsetbits(bus, DCDC_EN, 0, 1 << (buck - 1));
+	rk808_clrsetbits(buck_reg, 0x3f, vsel);
+	rk808_clrsetbits(DCDC_EN, 0, 1 << (buck - 1));
 }