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mb/intel/coffeelake_rvp: Remove superfluous header file 

TEST: same sha256sum with BUILD_TIMELESS=1.

Change-Id: Icf3368bcf1351f0e7cd4041c3792d76362aec9e5
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/28331
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
This commit is contained in:
Arthur Heymans 2018-08-24 10:29:42 +02:00
parent 24151963f3
commit 4d5616bf40
5 changed files with 0 additions and 45 deletions
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1
src/mainboard/intel/coffeelake_rvp/bootblock.c
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@ -16,7 +16,6 @@
#include <baseboard/variants.h>
#include <bootblock_common.h>
#include <soc/gpio.h>
#include <variant/gpio.h>
void bootblock_mainboard_init(void)
{

1
src/mainboard/intel/coffeelake_rvp/chromeos.c
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@ -18,7 +18,6 @@
#include <gpio.h>
#include <rules.h>
#include <soc/gpio.h>
#include <variant/gpio.h>
#include <vendorcode/google/chromeos/chromeos.h>
#if ENV_RAMSTAGE

1
src/mainboard/intel/coffeelake_rvp/mainboard.c
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@ -20,7 +20,6 @@
#include <soc/gpio.h>
#include <soc/nhlt.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include <variant/gpio.h>
static void mainboard_init(void *chip_info)
{

21
src/mainboard/intel/coffeelake_rvp/variants/cfl_h/include/variant/gpio.h
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@ -1,21 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2018 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
* GNU General Public License for more details.
*/
#ifndef __MAINBOARD_GPIO_H__
#define __MAINBOARD_GPIO_H__
#include <baseboard/gpio.h>
#endif /* __MAINBOARD_GPIO_H__ */

21
src/mainboard/intel/coffeelake_rvp/variants/cfl_u/include/variant/gpio.h
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@ -1,21 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2018 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
* GNU General Public License for more details.
*/
#ifndef __MAINBOARD_GPIO_H__
#define __MAINBOARD_GPIO_H__
#include <baseboard/gpio.h>
#endif /* __MAINBOARD_GPIO_H__ */