mb/google/dedede: Add new variant drawcia

Add initial support for drawcia

BUG=b:158540280
BRANCH=None
TEST=build

Change-Id: Ic775bb2a93581e422379ca90127e3581bbf3c89e
Signed-off-by: Wisley Chen <wisley.chen@quantatw.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42229
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Marco Chen <marcochen@google.com>
This commit is contained in:
Wisley Chen 2020-06-09 19:44:27 +08:00 committed by Karthik Ramasubramanian
parent 92c779200a
commit 4d58083703
8 changed files with 84 additions and 0 deletions

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@ -56,6 +56,7 @@ config MAINBOARD_FAMILY
config MAINBOARD_PART_NUMBER
string
default "Dedede" if BOARD_GOOGLE_DEDEDE
default "Drawcia" if BOARD_GOOGLE_DRAWCIA
default "Waddledoo" if BOARD_GOOGLE_WADDLEDOO
default "Waddledee" if BOARD_GOOGLE_WADDLEDEE
default "Wheelie" if BOARD_GOOGLE_WHEELIE
@ -79,6 +80,7 @@ config UART_FOR_CONSOLE
config VARIANT_DIR
string
default "dedede" if BOARD_GOOGLE_DEDEDE
default "drawcia" if BOARD_GOOGLE_DRAWCIA
default "waddledoo" if BOARD_GOOGLE_WADDLEDOO
default "waddledee" if BOARD_GOOGLE_WADDLEDEE
default "wheelie" if BOARD_GOOGLE_WHEELIE

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@ -4,6 +4,12 @@ config BOARD_GOOGLE_DEDEDE
select BASEBOARD_DEDEDE_LAPTOP
select BOARD_ROMSIZE_KB_32768
config BOARD_GOOGLE_DRAWCIA
bool "Drawcia"
select BOARD_GOOGLE_BASEBOARD_DEDEDE
select BASEBOARD_DEDEDE_LAPTOP
select BOARD_ROMSIZE_KB_32768
config BOARD_GOOGLE_WADDLEDOO
bool "Waddledoo"
select BOARD_GOOGLE_BASEBOARD_DEDEDE

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@ -0,0 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef MAINBOARD_EC_H
#define MAINBOARD_EC_H
#include <baseboard/ec.h>
#endif

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@ -0,0 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef MAINBOARD_GPIO_H
#define MAINBOARD_GPIO_H
#include <baseboard/gpio.h>
#endif /* MAINBOARD_GPIO_H */

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@ -0,0 +1,5 @@
## SPDX-License-Identifier: GPL-2.0-or-later
## This is an auto-generated file. Do not edit!!
SPD_SOURCES =
SPD_SOURCES += spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:E

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@ -0,0 +1,2 @@
DRAM Part Name ID to assign
MT53E512M32D2NP-046 WT:E 0 (0000)

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@ -0,0 +1 @@
MT53E512M32D2NP-046 WT:E

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@ -0,0 +1,52 @@
chip soc/intel/jasperlake
# Intel Common SoC Config
#+-------------------+---------------------------+
#| Field | Value |
#+-------------------+---------------------------+
#| GSPI0 | cr50 TPM. Early init is |
#| | required to set up a BAR |
#| | for TPM communication |
#| | before memory is up |
#| I2C0 | Trackpad |
#| I2C1 | Digitizer |
#| I2C2 | Touchscreen |
#| I2C3 | Camera |
#| I2C4 | Audio |
#+-------------------+---------------------------+
register "common_soc_config" = "{
.gspi[0] = {
.speed_mhz = 1,
.early_init = 1,
},
.i2c[0] = {
.speed = I2C_SPEED_FAST,
},
.i2c[1] = {
.speed = I2C_SPEED_FAST,
},
.i2c[2] = {
.speed = I2C_SPEED_FAST,
},
.i2c[3] = {
.speed = I2C_SPEED_FAST,
},
.i2c[4] = {
.speed = I2C_SPEED_FAST,
},
}"
device domain 0 on
device pci 15.0 on
chip drivers/i2c/hid
register "generic.hid" = ""PNP0C50""
register "generic.desc" = ""Synaptics Touchpad""
register "generic.irq" = "ACPI_IRQ_WAKE_EDGE_LOW(GPP_B3_IRQ)"
register "generic.wake" = "GPE0_DW0_03"
register "generic.probed" = "1"
register "hid_desc_reg_offset" = "0x20"
device i2c 0x2c on end
end
end
end
end