Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-55
Creator: Yinghai Lu <yhlu@tyan.com> intel car to x86 car git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1971 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -101,7 +101,7 @@ if USE_DCACHE_RAM
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end
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if CONFIG_USE_INIT
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ldscript /cpu/intel/car/cache_as_ram.lds
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ldscript /cpu/x86/car/cache_as_ram.lds
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end
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end
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@ -133,7 +133,7 @@ if USE_DCACHE_RAM
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##
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## Setup Cache-As-Ram
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##
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mainboardinit cpu/intel/car/cache_as_ram.inc
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mainboardinit cpu/x86/car/cache_as_ram.inc
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end
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###
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@ -80,7 +80,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
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#include "sdram/generic_sdram.c"
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#include "cpu/intel/car/copy_and_run.c"
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#include "cpu/x86/car/copy_and_run.c"
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#if USE_FALLBACK_IMAGE == 1
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@ -295,11 +295,11 @@ cpu_reset_x:
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if(cpu_reset==0) {
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#define CLEAR_FIRST_1M_RAM 1
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#include "cpu/intel/car/cache_as_ram_post.c"
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#include "cpu/x86/car/cache_as_ram_post.c"
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}
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else {
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#undef CLEAR_FIRST_1M_RAM
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#include "cpu/intel/car/cache_as_ram_post.c"
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#include "cpu/x86/car/cache_as_ram_post.c"
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}
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__asm__ volatile (
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@ -143,11 +143,11 @@ chip northbridge/amd/amdk8/root_complex
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device pci 9.0 on end #broadcom
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device pci 9.1 on end
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end
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chip drivers/lsi/53c1030
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device pci a.0 on end
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device pci a.1 on end
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register "fw_address" = "0xfff8c000"
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end
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# chip drivers/lsi/53c1030
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# device pci a.0 on end
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# device pci a.1 on end
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# register "fw_address" = "0xfff8c000"
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# end
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end
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device pci 0.1 on end
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device pci 1.0 on end
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