mb/google/myst: Add initial I2C configuration
Add I2C peripheral reset configuration required during early init. Enabled I2C generic and HID drivers. BUG=b:275939564 TEST=builds Signed-off-by: Jon Murphy <jpmurphy@google.com> Change-Id: I44668295fb6ed03992df9d9fc075792e181d1a8a Reviewed-on: https://review.coreboot.org/c/coreboot/+/74108 Reviewed-by: Tim Van Patten <timvp@google.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -9,6 +9,8 @@ config BOARD_SPECIFIC_OPTIONS
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def_bool y
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select AMD_SOC_CONSOLE_UART
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select BOARD_ROMSIZE_KB_16384
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select DRIVERS_I2C_GENERIC
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select DRIVERS_I2C_HID
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select EC_GOOGLE_CHROMEEC
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select EC_GOOGLE_CHROMEEC_ESPI
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select ELOG
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@ -1,5 +1,40 @@
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# SPDX-License-Identifier: GPL-2.0-or-later
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chip soc/amd/phoenix
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register "i2c_scl_reset" = "GPIO_I2C0_SCL | GPIO_I2C1_SCL |
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GPIO_I2C2_SCL | GPIO_I2C3_SCL"
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# I2C Pad Control RX Select Configuration
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register "i2c_pad[0].rx_level" = "I2C_PAD_RX_1_8V" # Trackpad
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register "i2c_pad[1].rx_level" = "I2C_PAD_RX_1_8V" # Touchscreen
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register "i2c_pad[2].rx_level" = "I2C_PAD_RX_1_8V" # GSC
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register "i2c_pad[3].rx_level" = "I2C_PAD_RX_1_8V" # Speaker, Codec, P-SAR, USB
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# I2C Config
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#+-------------------+----------------------------+
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#| Field | Value |
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#+-------------------+----------------------------+
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#| I2C0 | Trackpad |
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#| I2C1 | Touchscreen |
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#| I2C2 | GSC TPM |
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#| I2C3 | Speaker, Codec, P-SAR, USB |
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#+-------------------+----------------------------+
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register "i2c[0]" = "{
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.speed = I2C_SPEED_FAST,
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}"
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register "i2c[1]" = "{
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.speed = I2C_SPEED_FAST,
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}"
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register "i2c[2]" = "{
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.speed = I2C_SPEED_FAST,
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.early_init = true,
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}"
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register "i2c[3]" = "{
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.speed = I2C_SPEED_FAST,
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}"
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device domain 0 on
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device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A
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device ref gfx on end # Internal GPU (GFX)
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@ -111,4 +146,8 @@ chip soc/amd/phoenix
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end
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end # domain
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device ref uart_0 on end # UART0
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device ref i2c_0 on end
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device ref i2c_1 on end
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device ref i2c_2 on end
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device ref i2c_3 on end
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end # chip soc/amd/phoenix
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