tegra132: Add support for pmc_rst_status get and print

BUG=None
BRANCH=None
TEST=Compiles successfully and pmc rst status POR is seen.

Change-Id: Ic09cb46d9be7670e467543e42b251efb1a4313d0
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 5dbfae6bbc0f4f30e216e37b515f4120f7833a38
Original-Change-Id: Id0c2b208222deaf099b8938ba583551979588d52
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/220721
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/9106
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

src/soc/nvidia/tegra132/Makefile.inc

@@ -8,6 +8,7 @@ bootblock-y += i2c.c
 bootblock-y += dma.c
 bootblock-y += monotonic_timer.c
 bootblock-y += padconfig.c
+bootblock-y += power.c
 bootblock-y += funitcfg.c
 bootblock-y += reset.c
 bootblock-y += ../tegra/gpio.c

src/soc/nvidia/tegra132/bootblock.c

@@ -64,6 +64,8 @@ void main(void)
 
 	printk(BIOS_INFO, "T132 bootblock: Clock init done\n");
 
+	pmc_print_rst_status();
+
 	bootblock_mainboard_init();
 
 	printk(BIOS_INFO, "T132 bootblock: Mainboard bootblock init done\n");

src/soc/nvidia/tegra132/pmc.h

@@ -316,6 +316,16 @@ struct tegra_pmc_regs {
 
 check_member(tegra_pmc_regs, scratch119, 0x6fc);
 
+enum {
+	PMC_RST_STATUS_SOURCE_MASK = 0x7,
+	PMC_RST_STATUS_SOURCE_POR = 0x0,
+	PMC_RST_STATUS_SOURCE_WATCHDOG = 0x1,
+	PMC_RST_STATUS_SOURCE_SENSOR = 0x2,
+	PMC_RST_STATUS_SOURCE_SW_MAIN = 0x3,
+	PMC_RST_STATUS_SOURCE_LP0 = 0x4,
+	PMC_RST_STATUS_NUM_SOURCES = 0x5,
+};
+
 enum {
 	PMC_PWRGATE_TOGGLE_PARTID_MASK = 0x1f,
 	PMC_PWRGATE_TOGGLE_PARTID_SHIFT = 0,

src/soc/nvidia/tegra132/power.c

@@ -19,6 +19,7 @@
  */
 
 #include <arch/io.h>
+#include <assert.h>
 #include <console/console.h>
 #include <soc/addressmap.h>
 
@@ -55,3 +56,24 @@ void power_ungate_partition(uint32_t id)
 
 	printk(BIOS_INFO, "Ungated power partition %d.\n", id);
 }
+
+uint8_t pmc_rst_status(void)
+{
+	return read32(&pmc->rst_status) & PMC_RST_STATUS_SOURCE_MASK;
+}
+
+static const char *pmc_rst_status_str[PMC_RST_STATUS_NUM_SOURCES] = {
+	[PMC_RST_STATUS_SOURCE_POR] = "POR",
+	[PMC_RST_STATUS_SOURCE_WATCHDOG] = "Watchdog",
+	[PMC_RST_STATUS_SOURCE_SENSOR] = "Sensor",
+	[PMC_RST_STATUS_SOURCE_SW_MAIN] = "SW Main",
+	[PMC_RST_STATUS_SOURCE_LP0] = "LP0",
+};
+
+void pmc_print_rst_status(void)
+{
+	uint8_t rst_status = pmc_rst_status();
+	assert(rst_status < PMC_RST_STATUS_NUM_SOURCES);
+	printk(BIOS_INFO, "PMC Reset Status: %s\n",
+	       pmc_rst_status_str[rst_status]);
+}

src/soc/nvidia/tegra132/power.h

@@ -24,4 +24,7 @@
 
 void power_ungate_partition(uint32_t id);
 
+uint8_t pmc_rst_status(void);
+void pmc_print_rst_status(void);
+
 #endif	/* __SOC_NVIDIA_TEGRA132_POWER_H__ */