mb/google/volteer/var/collis: Update DPTF parameters for DVT build

Update Passive Policy and TCHG parameters.

BUG=b:188936764
TEST=emerge-volteer coreboot chromeos-bootimage

Signed-off-by: FrankChu <frank_chu@pegatron.corp-partner.google.com>
Change-Id: Id75bfa74ba353f2342c95bcf8d73cd83c957deb5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56512
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
FrankChu 2021-07-22 17:04:00 +08:00 committed by Patrick Georgi
parent ac522f1cd7
commit 4db34f6823
1 changed files with 6 additions and 5 deletions

View File

@ -56,7 +56,8 @@ chip soc/intel/tigerlake
## Passive Policy
register "policies.passive" = "{
[0] = DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 52, 10000),
[1] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_0, 53, 30000)}"
[1] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_0, 58, 30000),
[2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 53, 10000)}"
## Power Limits Control
# 7-9W PL1 in 200mW increments, avg over 28-32s interval
@ -75,10 +76,10 @@ chip soc/intel/tigerlake
## Charger Performance Control (Control, mA)
register "controls.charger_perf" = "{
[0] = { 255, 2500 },
[1] = { 24, 1900 },
[2] = { 16, 1500 },
[3] = { 8, 1000 }}"
[0] = { 40, 2500 },
[1] = { 30, 1900 },
[2] = { 24, 1500 },
[3] = { 16, 1000 }}"
## Fan Performance Control (Percent, Speed, Noise, Power)
register "controls.fan_perf" = "{[0] = {0}}"