mb/google/volteer/var/collis: Update DPTF parameters for DVT build
Update Passive Policy and TCHG parameters. BUG=b:188936764 TEST=emerge-volteer coreboot chromeos-bootimage Signed-off-by: FrankChu <frank_chu@pegatron.corp-partner.google.com> Change-Id: Id75bfa74ba353f2342c95bcf8d73cd83c957deb5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56512 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -56,7 +56,8 @@ chip soc/intel/tigerlake
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## Passive Policy
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register "policies.passive" = "{
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[0] = DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 52, 10000),
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[1] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_0, 53, 30000)}"
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[1] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_0, 58, 30000),
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[2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 53, 10000)}"
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## Power Limits Control
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# 7-9W PL1 in 200mW increments, avg over 28-32s interval
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@ -75,10 +76,10 @@ chip soc/intel/tigerlake
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## Charger Performance Control (Control, mA)
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register "controls.charger_perf" = "{
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[0] = { 255, 2500 },
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[1] = { 24, 1900 },
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[2] = { 16, 1500 },
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[3] = { 8, 1000 }}"
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[0] = { 40, 2500 },
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[1] = { 30, 1900 },
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[2] = { 24, 1500 },
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[3] = { 16, 1000 }}"
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## Fan Performance Control (Percent, Speed, Noise, Power)
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register "controls.fan_perf" = "{[0] = {0}}"
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