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binaryPI: Drop nested northbridge in devicetree 

SPD data needs to remain within same chip -block
with device 0:18.2.

Change-Id: Ic12481b637ee5f5119faec3239b477f613e4e511
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/31271
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
This commit is contained in:
Kyösti Mälkki 2019-02-07 13:25:51 +02:00
parent 5edbea02d4
commit 4dba4975b4
9 changed files with 491 additions and 501 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

67
src/mainboard/amd/bettong/devicetree.cb
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@ -21,53 +21,54 @@ chip northbridge/amd/pi/00660F01/root_complex
device domain 0 on device domain 0 on
subsystemid 0x1022 0x1410 inherit subsystemid 0x1022 0x1410 inherit
chip northbridge/amd/pi/00660F01 # CPU side of HT root complex
chip northbridge/amd/pi/00660F01 # PCI side of HT root complex chip northbridge/amd/pi/00660F01
device pci 0.0 on end # Root Complex device pci 0.0 on end # Root Complex
device pci 1.0 on end # Internal Graphics P2P bridge 0x9804 device pci 1.0 on end # Internal Graphics P2P bridge 0x9804
device pci 1.1 on end # Internal Multimedia device pci 1.1 on end # Internal Multimedia
device pci 2.0 on end # PCIe Host Bridge device pci 2.0 on end # PCIe Host Bridge
device pci 2.1 on end # x4 PCIe slot device pci 2.1 on end # x4 PCIe slot
device pci 2.2 on end # mPCIe slot device pci 2.2 on end # mPCIe slot
device pci 2.3 on end # Realtek NIC device pci 2.3 on end # Realtek NIC
device pci 2.4 on end # Edge Connector device pci 2.4 on end # Edge Connector
device pci 2.5 on end # Edge Connector device pci 2.5 on end # Edge Connector
device pci 3.0 on end # Edge Connector device pci 3.0 on end # Edge Connector
device pci 3.1 on end # Edge Connector device pci 3.1 on end # Edge Connector
end #chip northbridge/amd/pi/00660F01 end #chip northbridge/amd/pi/00660F01
chip southbridge/amd/pi/hudson # it is under NB/SB Link, but on the same pci bus chip southbridge/amd/pi/hudson
device pci 9.0 on end # HDA device pci 9.0 on end # HDA
device pci 9.2 on end # HDA device pci 9.2 on end # HDA
device pci 10.0 on end # USB device pci 10.0 on end # USB
device pci 11.0 on end # SATA device pci 11.0 on end # SATA
device pci 12.0 on end # USB device pci 12.0 on end # USB
device pci 14.0 on # SM device pci 14.0 on # SM
chip drivers/generic/generic #dimm 0-0-0 chip drivers/generic/generic #dimm 0-0-0
device i2c 50 on end device i2c 50 on end
end end
chip drivers/generic/generic #dimm 0-0-1 chip drivers/generic/generic #dimm 0-0-1
device i2c 51 on end device i2c 51 on end
end end
end # SM end # SM
#device pci 14.2 on end # HDA 0x4383 #device pci 14.2 on end # HDA 0x4383
device pci 14.3 on end # LPC 0x439d device pci 14.3 on end # LPC 0x439d
device pci 14.7 on end # SD device pci 14.7 on end # SD
end #chip southbridge/amd/pi/hudson end #chip southbridge/amd/pi/hudson
chip northbridge/amd/pi/00660F01
device pci 18.0 on end device pci 18.0 on end
device pci 18.1 on end device pci 18.1 on end
device pci 18.2 on end device pci 18.2 on end
device pci 18.3 on end device pci 18.3 on end
device pci 18.4 on end device pci 18.4 on end
device pci 18.5 on end device pci 18.5 on end
register "spdAddrLookup" = " register "spdAddrLookup" = "
{ {
{ {0xA0, 0xA4}, {0xA2, 0xA6}, }, // socket 0 - Channel 0 & 1 - 8-bit SPD addresses { {0xA0, 0xA4}, {0xA2, 0xA6}, }, // socket 0 - Channel 0 & 1 - 8-bit SPD addresses
{ {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses { {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses
}" }"
end
end #chip northbridge/amd/pi/00660F01 # CPU side of HT root complex
end #domain end #domain
end #northbridge/amd/pi/00660F01/root_complex end #northbridge/amd/pi/00660F01/root_complex

64
src/mainboard/amd/db-ft3b-lc/devicetree.cb
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@ -22,42 +22,40 @@ chip northbridge/amd/pi/00730F01/root_complex
device domain 0 on device domain 0 on
subsystemid 0x1022 0x1410 inherit subsystemid 0x1022 0x1410 inherit
chip northbridge/amd/pi/00730F01 # CPU side of HT root complex
chip northbridge/amd/pi/00730F01 # PCI side of HT root complex chip northbridge/amd/pi/00730F01
device pci 0.0 on end # Root Complex device pci 0.0 on end # Root Complex
device pci 0.2 off end # IOMMU device pci 0.2 off end # IOMMU
device pci 1.0 on end # Internal Graphics P2P bridge 0x9804 device pci 1.0 on end # Internal Graphics P2P bridge 0x9804
device pci 1.1 on end # Internal Multimedia device pci 1.1 on end # Internal Multimedia
device pci 2.0 on end # PCIe Host Bridge device pci 2.0 on end # PCIe Host Bridge
device pci 2.1 on end # x4 PCIe slot device pci 2.1 on end # x4 PCIe slot
device pci 2.2 on end # mPCIe slot device pci 2.2 on end # mPCIe slot
device pci 2.3 on end # Realtek NIC device pci 2.3 on end # Realtek NIC
device pci 2.4 off end # Edge Connector device pci 2.4 off end # Edge Connector
device pci 2.5 off end # Edge Connector device pci 2.5 off end # Edge Connector
device pci 8.0 off end # Platform Security Processor device pci 8.0 off end # Platform Security Processor
end #chip northbridge/amd/pi/00730F01 end #chip northbridge/amd/pi/00730F01
chip southbridge/amd/pi/hudson # it is under NB/SB Link, but on the same pci bus chip southbridge/amd/pi/hudson
device pci 10.0 on end # XHCI HC0 device pci 10.0 on end # XHCI HC0
device pci 11.0 on end # SATA device pci 11.0 on end # SATA
device pci 12.0 on end # EHCI #0 device pci 12.0 on end # EHCI #0
device pci 13.0 on end # EHCI #1 device pci 13.0 on end # EHCI #1
device pci 14.0 on end # SMBus device pci 14.0 on end # SMBus
device pci 14.2 on end # HDA 0x4383 device pci 14.2 on end # HDA 0x4383
device pci 14.3 on end # LPC 0x439d device pci 14.3 on end # LPC 0x439d
device pci 14.7 on end # SD device pci 14.7 on end # SD
device pci 16.0 on end # EHCI #2 device pci 16.0 on end # EHCI #2
register "sd_mode" = "3" register "sd_mode" = "3"
end #chip southbridge/amd/pi/hudson end #chip southbridge/amd/pi/hudson
device pci 18.0 on end device pci 18.0 on end
device pci 18.1 on end device pci 18.1 on end
device pci 18.2 on end device pci 18.2 on end
device pci 18.3 on end device pci 18.3 on end
device pci 18.4 on end device pci 18.4 on end
device pci 18.5 on end device pci 18.5 on end
end #chip northbridge/amd/pi/00730F01 # CPU side of HT root complex
end #domain end #domain
end #northbridge/amd/pi/00730F01/root_complex end #northbridge/amd/pi/00730F01/root_complex

132
src/mainboard/amd/lamar/devicetree.cb
View File

@ -22,81 +22,81 @@ chip northbridge/amd/pi/00630F01/root_complex
device domain 0 on device domain 0 on
subsystemid 0x1022 0x1410 inherit subsystemid 0x1022 0x1410 inherit
chip northbridge/amd/pi/00630F01 # CPU side of HT root complex
chip northbridge/amd/pi/00630F01 # PCI side of HT root complex chip northbridge/amd/pi/00630F01
device pci 0.0 on end # 0x1422 Root Complex device pci 0.0 on end # 0x1422 Root Complex
device pci 0.2 off end # 0x1423 IOMMU device pci 0.2 off end # 0x1423 IOMMU
device pci 1.0 on end # 0x13XX Internal Graphics device pci 1.0 on end # 0x13XX Internal Graphics
device pci 1.1 on end # 0x1308 DisplayPort/HDMI Audio device pci 1.1 on end # 0x1308 DisplayPort/HDMI Audio
device pci 2.0 on end # 0x1424 GFX PCIe Host Bridge device pci 2.0 on end # 0x1424 GFX PCIe Host Bridge
device pci 2.1 on end # 0x1425 P2P Bridge for GFX PCIe Port 0 (PCIe x16 slot J119) device pci 2.1 on end # 0x1425 P2P Bridge for GFX PCIe Port 0 (PCIe x16 slot J119)
device pci 2.2 off end # 0x1425 P2P Bridge for GFX PCIe Port 1 device pci 2.2 off end # 0x1425 P2P Bridge for GFX PCIe Port 1
device pci 3.0 on end # 0x1424 GPP PCIe Host Bridge device pci 3.0 on end # 0x1424 GPP PCIe Host Bridge
device pci 3.1 on end # 0x1426 P2P Bridge for GPP PCIe Port 0 (PCIe x4 slot J118) device pci 3.1 on end # 0x1426 P2P Bridge for GPP PCIe Port 0 (PCIe x4 slot J118)
device pci 3.2 on end # 0x1426 P2P Bridge for GPP PCIe Port 1 (PCIe x4 slot J120) device pci 3.2 on end # 0x1426 P2P Bridge for GPP PCIe Port 1 (PCIe x4 slot J120)
device pci 3.3 off end # 0x1426 P2P Bridge for GPP PCIe Port 2 device pci 3.3 off end # 0x1426 P2P Bridge for GPP PCIe Port 2
device pci 3.4 off end # 0x1426 P2P Bridge for GPP PCIe Port 3 device pci 3.4 off end # 0x1426 P2P Bridge for GPP PCIe Port 3
device pci 3.5 off end # 0x1426 P2P Bridge for GPP PCIe Port 4 device pci 3.5 off end # 0x1426 P2P Bridge for GPP PCIe Port 4
device pci 4.0 on end # 0x1424 UMI PCIe Host Bridge device pci 4.0 on end # 0x1424 UMI PCIe Host Bridge
# device pci 4.1 on end # 0x1426 P2P bridge for UMI link # device pci 4.1 on end # 0x1426 P2P bridge for UMI link
# device pci 4.2 off end # 0x1426 Virtual P2P bridge for SB PCIe Port 3 # device pci 4.2 off end # 0x1426 Virtual P2P bridge for SB PCIe Port 3
# device pci 4.3 off end # 0x1426 Virtual P2P bridge for SB PCIe Port 2 # device pci 4.3 off end # 0x1426 Virtual P2P bridge for SB PCIe Port 2
# device pci 4.4 off end # 0x1426 Virtual P2P bridge for SB PCIe Port 1 # device pci 4.4 off end # 0x1426 Virtual P2P bridge for SB PCIe Port 1
# device pci 4.5 off end # 0x1426 Virtual P2P bridge for SB PCIe Port 0 # device pci 4.5 off end # 0x1426 Virtual P2P bridge for SB PCIe Port 0
end #chip northbridge/amd/pi/00630F01 end #chip northbridge/amd/pi/00630F01
chip southbridge/amd/pi/hudson chip southbridge/amd/pi/hudson
device pci 10.0 on end # 0x7814 XHCI HC0 device pci 10.0 on end # 0x7814 XHCI HC0
device pci 10.1 on end # 0x7814 XHCI HC1 device pci 10.1 on end # 0x7814 XHCI HC1
device pci 11.0 on end # 0x7800-0x7805 SATA (device ID depends on mode) device pci 11.0 on end # 0x7800-0x7805 SATA (device ID depends on mode)
device pci 12.0 on end # 0x7807 USB OHCI device pci 12.0 on end # 0x7807 USB OHCI
device pci 12.2 on end # 0x7808 USB EHCI device pci 12.2 on end # 0x7808 USB EHCI
device pci 13.0 on end # 0x7807 USB OHCI device pci 13.0 on end # 0x7807 USB OHCI
device pci 13.2 on end # 0x7808 USB EHCI device pci 13.2 on end # 0x7808 USB EHCI
device pci 14.0 on # 0x780B SMBus device pci 14.0 on # 0x780B SMBus
chip drivers/generic/generic #dimm 0-0-0 chip drivers/generic/generic #dimm 0-0-0
device i2c 50 on end device i2c 50 on end
end
chip drivers/generic/generic #dimm 0-0-1
device i2c 51 on end
end
chip drivers/generic/generic #dimm 0-1-0
device i2c 52 on end
end
chip drivers/generic/generic #dimm 0-1-1
device i2c 53 on end
end
end # SM
device pci 14.1 on end # 0x780C IDE
device pci 14.2 on end # 0x780D HDA
device pci 14.3 on # 0x780E LPC
chip superio/fintek/f81216h
register "conf_key_mode" = "0x77"
device pnp 4e.0 on # COM1
io 0x60 = 0x3f8
irq 0x70 = 4
end end
chip drivers/generic/generic #dimm 0-0-1 device pnp 4e.1 on # COM2
device i2c 51 on end io 0x60 = 0x2f8
irq 0x70 = 3
end end
chip drivers/generic/generic #dimm 0-1-0 device pnp 4e.2 off end # COM3
device i2c 52 on end device pnp 4e.3 off end # COM4
end device pnp 4e.8 off end # WDT
chip drivers/generic/generic #dimm 0-1-1 end # f81865f
device i2c 53 on end end #LPC
end device pci 14.4 on end # 0x780F PCI :: PCI-b conflict with GPIO.
end # SM device pci 14.5 on end # 0x7809 USB OHCI
device pci 14.1 on end # 0x780C IDE device pci 14.7 on end # 0x7806 SD Flash Controller
device pci 14.2 on end # 0x780D HDA device pci 15.0 on end # 0x43A0 SB GPP Port 0 (Integrated Realtek GbE Controller)
device pci 14.3 on # 0x780E LPC device pci 15.1 on end # 0x43A1 SB GPP Port 1 (mPCIe slot J122)
chip superio/fintek/f81216h device pci 15.2 on end # 0x43A2 SB GPP Port 2 (mPCIe slot J123)
register "conf_key_mode" = "0x77" device pci 15.3 off end # 0x43A3 SB GPP Port 3
device pnp 4e.0 on # COM1 register "gpp_configuration" = "4"
io 0x60 = 0x3f8 device pci 16.0 on end # 0x7809 USB OHCI (when the xHCI device is disabled)
irq 0x70 = 4 end #southbridge/amd/pi/hudson
end
device pnp 4e.1 on # COM2
io 0x60 = 0x2f8
irq 0x70 = 3
end
device pnp 4e.2 off end # COM3
device pnp 4e.3 off end # COM4
device pnp 4e.8 off end # WDT
end # f81865f
end #LPC
device pci 14.4 on end # 0x780F PCI :: PCI-b conflict with GPIO.
device pci 14.5 on end # 0x7809 USB OHCI
device pci 14.7 on end # 0x7806 SD Flash Controller
device pci 15.0 on end # 0x43A0 SB GPP Port 0 (Integrated Realtek GbE Controller)
device pci 15.1 on end # 0x43A1 SB GPP Port 1 (mPCIe slot J122)
device pci 15.2 on end # 0x43A2 SB GPP Port 2 (mPCIe slot J123)
device pci 15.3 off end # 0x43A3 SB GPP Port 3
register "gpp_configuration" = "4"
device pci 16.0 on end # 0x7809 USB OHCI (when the xHCI device is disabled)
end #southbridge/amd/pi/hudson
chip northbridge/amd/pi/00630F01
device pci 18.0 on end # 0x141A HT Configuration device pci 18.0 on end # 0x141A HT Configuration
device pci 18.1 on end # 0x141B Address Maps device pci 18.1 on end # 0x141B Address Maps
device pci 18.2 on end # 0x141C DRAM Configuration device pci 18.2 on end # 0x141C DRAM Configuration
@ -108,7 +108,7 @@ chip northbridge/amd/pi/00630F01/root_complex
{ {
{ {0xA0, 0xA4}, {0xA2, 0xA6}, }, // socket 0 - Channel 0 & 1 - 8-bit SPD addresses { {0xA0, 0xA4}, {0xA2, 0xA6}, }, // socket 0 - Channel 0 & 1 - 8-bit SPD addresses
}" }"
end
end #chip northbridge/amd/pi/00630F01 # CPU side of HT root complex
end #domain end #domain
end #northbridge/amd/pi/00630F01/root_complex end #northbridge/amd/pi/00630F01/root_complex

67
src/mainboard/amd/olivehillplus/devicetree.cb
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@ -21,52 +21,53 @@ chip northbridge/amd/pi/00730F01/root_complex
device domain 0 on device domain 0 on
subsystemid 0x1022 0x1410 inherit subsystemid 0x1022 0x1410 inherit
chip northbridge/amd/pi/00730F01 # CPU side of HT root complex
chip northbridge/amd/pi/00730F01 # PCI side of HT root complex chip northbridge/amd/pi/00730F01
device pci 0.0 on end # Root Complex device pci 0.0 on end # Root Complex
device pci 0.2 off end # IOMMU device pci 0.2 off end # IOMMU
device pci 1.0 on end # Internal Graphics P2P bridge 0x9804 device pci 1.0 on end # Internal Graphics P2P bridge 0x9804
device pci 1.1 on end # Internal Multimedia device pci 1.1 on end # Internal Multimedia
device pci 2.0 on end # PCIe Host Bridge device pci 2.0 on end # PCIe Host Bridge
device pci 2.1 on end # x4 PCIe slot device pci 2.1 on end # x4 PCIe slot
device pci 2.2 on end # mPCIe slot device pci 2.2 on end # mPCIe slot
device pci 2.3 on end # Realtek NIC device pci 2.3 on end # Realtek NIC
device pci 2.4 on end # Edge Connector device pci 2.4 on end # Edge Connector
device pci 2.5 on end # Edge Connector device pci 2.5 on end # Edge Connector
device pci 8.0 on end # Platform Security Processor device pci 8.0 on end # Platform Security Processor
end #chip northbridge/amd/pi/00730F01 end #chip northbridge/amd/pi/00730F01
chip southbridge/amd/pi/hudson # it is under NB/SB Link, but on the same pci bus chip southbridge/amd/pi/hudson
device pci 10.0 on end # XHCI HC0 device pci 10.0 on end # XHCI HC0
device pci 11.0 on end # SATA device pci 11.0 on end # SATA
device pci 12.0 on end # EHCI #0 device pci 12.0 on end # EHCI #0
device pci 13.0 on end # EHCI #1 device pci 13.0 on end # EHCI #1
device pci 14.0 on # SMBus device pci 14.0 on # SMBus
chip drivers/generic/generic #dimm 0-0-0 chip drivers/generic/generic #dimm 0-0-0
device i2c 50 on end device i2c 50 on end
end end
chip drivers/generic/generic #dimm 0-0-1 chip drivers/generic/generic #dimm 0-0-1
device i2c 51 on end device i2c 51 on end
end end
end # SMbus end # SMbus
device pci 14.2 on end # HDA 0x4383 device pci 14.2 on end # HDA 0x4383
device pci 14.3 on end # LPC 0x439d device pci 14.3 on end # LPC 0x439d
device pci 14.7 on end # SD device pci 14.7 on end # SD
device pci 16.0 on end # EHCI #2 device pci 16.0 on end # EHCI #2
end #chip southbridge/amd/pi/hudson end #chip southbridge/amd/pi/hudson
chip northbridge/amd/pi/00730F01
device pci 18.0 on end device pci 18.0 on end
device pci 18.1 on end device pci 18.1 on end
device pci 18.2 on end device pci 18.2 on end
device pci 18.3 on end device pci 18.3 on end
device pci 18.4 on end device pci 18.4 on end
device pci 18.5 on end device pci 18.5 on end
register "spdAddrLookup" = " register "spdAddrLookup" = "
{ {
{ {0xA0, 0xA2} }, // socket 0, channel 0, slots 0 & 1 - 8-bit SPD addresses { {0xA0, 0xA2} }, // socket 0, channel 0, slots 0 & 1 - 8-bit SPD addresses
}" }"
end
end #chip northbridge/amd/pi/00730F01 # CPU side of HT root complex
end #domain end #domain
end #northbridge/amd/pi/00730F01/root_complex end #northbridge/amd/pi/00730F01/root_complex

172
src/mainboard/bap/ode_e21XX/devicetree.cb
View File

@ -21,96 +21,94 @@ chip northbridge/amd/pi/00730F01/root_complex
device domain 0 on device domain 0 on
subsystemid 0x1022 0x1410 inherit subsystemid 0x1022 0x1410 inherit
chip northbridge/amd/pi/00730F01 # CPU side of HT root complex
chip northbridge/amd/pi/00730F01 # PCI side of HT root complex chip northbridge/amd/pi/00730F01
device pci 0.0 on end # Root Complex device pci 0.0 on end # Root Complex
device pci 0.2 off end # IOMMU device pci 0.2 off end # IOMMU
device pci 1.0 on end # Internal Graphics P2P bridge 0x9804 device pci 1.0 on end # Internal Graphics P2P bridge 0x9804
device pci 1.1 on end # Internal Multimedia device pci 1.1 on end # Internal Multimedia
device pci 2.0 on end # PCIe Host Bridge device pci 2.0 on end # PCIe Host Bridge
device pci 2.1 on end # x4 PCIe slot device pci 2.1 on end # x4 PCIe slot
device pci 2.2 on end # PCIe Q7 Realtek GBit LAN device pci 2.2 on end # PCIe Q7 Realtek GBit LAN
device pci 2.3 on end # PCIe CB Realtek GBit LAN device pci 2.3 on end # PCIe CB Realtek GBit LAN
device pci 2.4 on end # PCIe x2 BAP FPGA device pci 2.4 on end # PCIe x2 BAP FPGA
device pci 8.0 on end # Platform Security Processor device pci 8.0 on end # Platform Security Processor
end #chip northbridge/amd/pi/00730F01 end #chip northbridge/amd/pi/00730F01
chip southbridge/amd/pi/hudson # it is under NB/SB Link, but on the same pci bus chip southbridge/amd/pi/hudson
device pci 10.0 on end # XHCI HC0 device pci 10.0 on end # XHCI HC0
device pci 11.0 on end # SATA device pci 11.0 on end # SATA
device pci 12.0 on end # EHCI #0 device pci 12.0 on end # EHCI #0
device pci 13.0 on end # EHCI #1 device pci 13.0 on end # EHCI #1
device pci 14.0 on end # SMBus device pci 14.0 on end # SMBus
device pci 14.2 on end # HDA 0x4383 device pci 14.2 on end # HDA 0x4383
device pci 14.3 on # LPC 0x439d device pci 14.3 on # LPC 0x439d
chip superio/fintek/f81866d chip superio/fintek/f81866d
register "hwm_amd_tsi_addr" = "0x98" # Set to AMD register "hwm_amd_tsi_addr" = "0x98" # Set to AMD
register "hwm_amd_tsi_control" = "0x02" # Set to AMD register "hwm_amd_tsi_control" = "0x02" # Set to AMD
register "hwm_fan_select" = "0xC0" # Sets Fan2 to PWM register "hwm_fan_select" = "0xC0" # Sets Fan2 to PWM
register "hwm_fan_mode" = "0xD5" # Sets FAN1-3 to Auto RPM mode register "hwm_fan_mode" = "0xD5" # Sets FAN1-3 to Auto RPM mode
register "hwm_fan3_control" = "0x00" # Fan control 23kHz register "hwm_fan3_control" = "0x00" # Fan control 23kHz
register "hwm_fan2_temp_map_select" = "0x1E" # Fan control 23kHz register "hwm_fan2_temp_map_select" = "0x1E" # Fan control 23kHz
register "hwm_fan2_bound1" = "0x3C" # 60°C register "hwm_fan2_bound1" = "0x3C" # 60°C
register "hwm_fan2_bound2" = "0x32" # 50°C register "hwm_fan2_bound2" = "0x32" # 50°C
register "hwm_fan2_bound3" = "0x28" # 40°C register "hwm_fan2_bound3" = "0x28" # 40°C
register "hwm_fan2_bound4" = "0x1E" # 30°C register "hwm_fan2_bound4" = "0x1E" # 30°C
register "hwm_fan2_seg1_speed" = "0xFF" # 100% register "hwm_fan2_seg1_speed" = "0xFF" # 100%
register "hwm_fan2_seg2_speed" = "0xD9" # 85% register "hwm_fan2_seg2_speed" = "0xD9" # 85%
register "hwm_fan2_seg3_speed" = "0xB2" # 70% register "hwm_fan2_seg3_speed" = "0xB2" # 70%
register "hwm_fan2_seg4_speed" = "0x99" # 60% register "hwm_fan2_seg4_speed" = "0x99" # 60%
register "hwm_fan2_seg5_speed" = "0x80" # 50% register "hwm_fan2_seg5_speed" = "0x80" # 50%
register "hwm_temp_sens_type" = "0x04" # Sets temp sensor 1 type to to thermistor register "hwm_temp_sens_type" = "0x04" # Sets temp sensor 1 type to to thermistor
device pnp 4e.0 off # Floppy device pnp 4e.0 off # Floppy
io 0x60 = 0x3f0 io 0x60 = 0x3f0
irq 0x70 = 6 irq 0x70 = 6
drq 0x74 = 2 drq 0x74 = 2
end end
device pnp 4e.3 off end # Parallel Port device pnp 4e.3 off end # Parallel Port
device pnp 4e.4 on # Hardware Monitor device pnp 4e.4 on # Hardware Monitor
io 0x60 = 0x295 io 0x60 = 0x295
irq 0x70 = 0 irq 0x70 = 0
end end
device pnp 4e.5 off # Keyboard device pnp 4e.5 off # Keyboard
io 0x60 = 0x60 io 0x60 = 0x60
io 0x62 = 0x64 io 0x62 = 0x64
irq 0x70 = 1 irq 0x70 = 1
end end
device pnp 4e.6 off end # GPIO device pnp 4e.6 off end # GPIO
device pnp 4e.7 on end # WDT device pnp 4e.7 on end # WDT
device pnp 4e.a off end # PME device pnp 4e.a off end # PME
device pnp 4e.10 on # COM1 device pnp 4e.10 on # COM1
io 0x60 = 0x3f8 io 0x60 = 0x3f8
irq 0x70 = 4 irq 0x70 = 4
end end
device pnp 4e.11 on # COM2 device pnp 4e.11 on # COM2
io 0x60 = 0x2f8 io 0x60 = 0x2f8
irq 0x70 = 3 irq 0x70 = 3
end end
device pnp 4e.12 off # COM3 device pnp 4e.12 off # COM3
io 0x60 = 0x3e8 io 0x60 = 0x3e8
irq 0x70 = 4 irq 0x70 = 4
end end
device pnp 4e.13 off # COM4 device pnp 4e.13 off # COM4
io 0x60 = 0x2e8 io 0x60 = 0x2e8
irq 0x70 = 3 irq 0x70 = 3
end end
device pnp 4e.14 off # COM5 device pnp 4e.14 off # COM5
end end
device pnp 4e.15 off # COM6 device pnp 4e.15 off # COM6
end end
end # f81866d end # f81866d
end #LPC end #LPC
device pci 14.7 on end # SD device pci 14.7 on end # SD
end #chip southbridge/amd/pi/hudson end #chip southbridge/amd/pi/hudson
device pci 18.0 on end device pci 18.0 on end
device pci 18.1 on end device pci 18.1 on end
device pci 18.2 on end device pci 18.2 on end
device pci 18.3 on end device pci 18.3 on end
device pci 18.4 on end device pci 18.4 on end
device pci 18.5 on end device pci 18.5 on end
end #chip northbridge/amd/pi/00730F01 # CPU side of HT root complex
end #domain end #domain
end #northbridge/amd/pi/00730F01/root_complex end #northbridge/amd/pi/00730F01/root_complex

126
src/mainboard/pcengines/apu2/variants/apu2/devicetree.cb
View File

@ -21,74 +21,72 @@ chip northbridge/amd/pi/00730F01/root_complex
device domain 0 on device domain 0 on
subsystemid 0x1022 0x1410 inherit subsystemid 0x1022 0x1410 inherit
chip northbridge/amd/pi/00730F01 # CPU side of HT root complex
chip northbridge/amd/pi/00730F01 # PCI side of HT root complex chip northbridge/amd/pi/00730F01
device pci 0.0 on end # Root Complex device pci 0.0 on end # Root Complex
device pci 0.2 on end # IOMMU device pci 0.2 on end # IOMMU
device pci 1.0 off end # Internal Graphics P2P bridge 0x9804 device pci 1.0 off end # Internal Graphics P2P bridge 0x9804
device pci 1.1 off end # Internal Multimedia device pci 1.1 off end # Internal Multimedia
device pci 2.0 on end # PCIe Host Bridge device pci 2.0 on end # PCIe Host Bridge
device pci 2.1 on end # mPCIe slot 2 (on GFX lane) device pci 2.1 on end # mPCIe slot 2 (on GFX lane)
device pci 2.2 on end # LAN3 device pci 2.2 on end # LAN3
device pci 2.3 on end # LAN2 device pci 2.3 on end # LAN2
device pci 2.4 on end # LAN1 device pci 2.4 on end # LAN1
device pci 2.5 on end # mPCIe slot 1 device pci 2.5 on end # mPCIe slot 1
device pci 8.0 on end # Platform Security Processor device pci 8.0 on end # Platform Security Processor
end #chip northbridge/amd/pi/00730F01 end #chip northbridge/amd/pi/00730F01
chip southbridge/amd/pi/hudson # it is under NB/SB Link, but on the same pci bus chip southbridge/amd/pi/hudson
device pci 10.0 on end # XHCI HC0 muxed with EHCI 2 device pci 10.0 on end # XHCI HC0 muxed with EHCI 2
device pci 11.0 on end # SATA device pci 11.0 on end # SATA
device pci 12.0 off end # USB EHCI0 usb[0:3] not connected device pci 12.0 off end # USB EHCI0 usb[0:3] not connected
device pci 13.0 on end # USB EHCI1 usb[4:7] device pci 13.0 on end # USB EHCI1 usb[4:7]
device pci 14.0 on end # SM device pci 14.0 on end # SM
device pci 14.3 on # LPC 0x439d device pci 14.3 on # LPC 0x439d
chip superio/nuvoton/nct5104d # SIO NCT5104D chip superio/nuvoton/nct5104d # SIO NCT5104D
register "irq_trigger_type" = "0" register "irq_trigger_type" = "0"
device pnp 2e.0 off end device pnp 2e.0 off end
device pnp 2e.2 on device pnp 2e.2 on
io 0x60 = 0x3f8 io 0x60 = 0x3f8
irq 0x70 = 4 irq 0x70 = 4
end end
device pnp 2e.3 on device pnp 2e.3 on
io 0x60 = 0x2f8 io 0x60 = 0x2f8
irq 0x70 = 3 irq 0x70 = 3
end end
device pnp 2e.10 on device pnp 2e.10 on
# UART C is conditionally turned on # UART C is conditionally turned on
io 0x60 = 0x3e8 io 0x60 = 0x3e8
irq 0x70 = 4 irq 0x70 = 4
end end
device pnp 2e.11 on device pnp 2e.11 on
# UART D is conditionally turned on # UART D is conditionally turned on
io 0x60 = 0x2e8 io 0x60 = 0x2e8
irq 0x70 = 3 irq 0x70 = 3
end end
device pnp 2e.8 off end device pnp 2e.8 off end
device pnp 2e.f off end device pnp 2e.f off end
# GPIO0 and GPIO1 are conditionally turned on # GPIO0 and GPIO1 are conditionally turned on
device pnp 2e.007 on end device pnp 2e.007 on end
device pnp 2e.107 on end device pnp 2e.107 on end
device pnp 2e.607 off end device pnp 2e.607 off end
device pnp 2e.e off end device pnp 2e.e off end
end # SIO NCT5104D end # SIO NCT5104D
chip drivers/pc80/tpm chip drivers/pc80/tpm
device pnp 0c31.0 on end device pnp 0c31.0 on end
end # LPC TPM end # LPC TPM
end # LPC 0x439d end # LPC 0x439d
device pci 14.7 on end # SD device pci 14.7 on end # SD
device pci 16.0 on end # USB EHCI2 usb[8:7] - muxed with XHCI device pci 16.0 on end # USB EHCI2 usb[8:7] - muxed with XHCI
end #chip southbridge/amd/pi/hudson end #chip southbridge/amd/pi/hudson
device pci 18.0 on end device pci 18.0 on end
device pci 18.1 on end device pci 18.1 on end
device pci 18.2 on end device pci 18.2 on end
device pci 18.3 on end device pci 18.3 on end
device pci 18.4 on end device pci 18.4 on end
device pci 18.5 on end device pci 18.5 on end
end #chip northbridge/amd/pi/00730F01 # CPU side of HT root complex
end #domain end #domain
end #northbridge/amd/pi/00730F01/root_complex end #northbridge/amd/pi/00730F01/root_complex

120
src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb
View File

@ -21,71 +21,69 @@ chip northbridge/amd/pi/00730F01/root_complex
device domain 0 on device domain 0 on
subsystemid 0x1022 0x1410 inherit subsystemid 0x1022 0x1410 inherit
chip northbridge/amd/pi/00730F01 # CPU side of HT root complex
chip northbridge/amd/pi/00730F01 # PCI side of HT root complex chip northbridge/amd/pi/00730F01
device pci 0.0 on end # Root Complex device pci 0.0 on end # Root Complex
device pci 0.2 on end # IOMMU device pci 0.2 on end # IOMMU
device pci 1.0 off end # Internal Graphics P2P bridge 0x9804 device pci 1.0 off end # Internal Graphics P2P bridge 0x9804
device pci 1.1 off end # Internal Multimedia device pci 1.1 off end # Internal Multimedia
device pci 2.0 on end # PCIe Host Bridge device pci 2.0 on end # PCIe Host Bridge
device pci 2.1 on end # mPCIe slot 2 (on GFX lane) device pci 2.1 on end # mPCIe slot 2 (on GFX lane)
device pci 2.2 on end # LAN3 device pci 2.2 on end # LAN3
device pci 2.3 on end # LAN2 device pci 2.3 on end # LAN2
device pci 2.4 on end # LAN1 device pci 2.4 on end # LAN1
device pci 2.5 on end # mPCIe slot 1 device pci 2.5 on end # mPCIe slot 1
device pci 8.0 on end # Platform Security Processor device pci 8.0 on end # Platform Security Processor
end #chip northbridge/amd/pi/00730F01 end #chip northbridge/amd/pi/00730F01
chip southbridge/amd/pi/hudson # it is under NB/SB Link, but on the same pci bus chip southbridge/amd/pi/hudson # it is under NB/SB Link, but on the same pci bus
device pci 10.0 on end # XHCI HC0 muxed with EHCI 2 device pci 10.0 on end # XHCI HC0 muxed with EHCI 2
device pci 11.0 on end # SATA device pci 11.0 on end # SATA
device pci 12.0 on end # USB EHCI0 usb[0:3] is connected device pci 12.0 on end # USB EHCI0 usb[0:3] is connected
device pci 13.0 on end # USB EHCI1 usb[4:7] device pci 13.0 on end # USB EHCI1 usb[4:7]
device pci 14.0 on end # SM device pci 14.0 on end # SM
device pci 14.3 on # LPC 0x439d device pci 14.3 on # LPC 0x439d
chip superio/nuvoton/nct5104d # SIO NCT5104D chip superio/nuvoton/nct5104d # SIO NCT5104D
register "irq_trigger_type" = "0" register "irq_trigger_type" = "0"
device pnp 2e.0 off end device pnp 2e.0 off end
device pnp 2e.2 on device pnp 2e.2 on
io 0x60 = 0x3f8 io 0x60 = 0x3f8
irq 0x70 = 4 irq 0x70 = 4
end end
device pnp 2e.3 on device pnp 2e.3 on
io 0x60 = 0x2f8 io 0x60 = 0x2f8
irq 0x70 = 3 irq 0x70 = 3
end end
device pnp 2e.10 on device pnp 2e.10 on
# UART C is conditionally turned on # UART C is conditionally turned on
io 0x60 = 0x3e8 io 0x60 = 0x3e8
irq 0x70 = 4 irq 0x70 = 4
end end
device pnp 2e.11 on device pnp 2e.11 on
# UART D is conditionally turned on # UART D is conditionally turned on
io 0x60 = 0x2e8 io 0x60 = 0x2e8
irq 0x70 = 3 irq 0x70 = 3
end end
device pnp 2e.8 off end device pnp 2e.8 off end
device pnp 2e.f off end device pnp 2e.f off end
# GPIO0 and GPIO1 are conditionally turned on # GPIO0 and GPIO1 are conditionally turned on
device pnp 2e.007 on end device pnp 2e.007 on end
device pnp 2e.107 on end device pnp 2e.107 on end
device pnp 2e.607 off end device pnp 2e.607 off end
device pnp 2e.e off end device pnp 2e.e off end
end # SIO NCT5104D end # SIO NCT5104D
end # LPC 0x439d end # LPC 0x439d
device pci 14.7 on end # SD device pci 14.7 on end # SD
device pci 16.0 on end # USB EHCI2 usb[8:7] - muxed with XHCI device pci 16.0 on end # USB EHCI2 usb[8:7] - muxed with XHCI
end #chip southbridge/amd/pi/hudson end #chip southbridge/amd/pi/hudson
device pci 18.0 on end device pci 18.0 on end
device pci 18.1 on end device pci 18.1 on end
device pci 18.2 on end device pci 18.2 on end
device pci 18.3 on end device pci 18.3 on end
device pci 18.4 on end device pci 18.4 on end
device pci 18.5 on end device pci 18.5 on end
end #chip northbridge/amd/pi/00730F01 # CPU side of HT root complex
end #domain end #domain
end #northbridge/amd/pi/00730F01/root_complex end #northbridge/amd/pi/00730F01/root_complex

120
src/mainboard/pcengines/apu2/variants/apu4/devicetree.cb
View File

@ -21,71 +21,69 @@ chip northbridge/amd/pi/00730F01/root_complex
device domain 0 on device domain 0 on
subsystemid 0x1022 0x1410 inherit subsystemid 0x1022 0x1410 inherit
chip northbridge/amd/pi/00730F01 # CPU side of HT root complex
chip northbridge/amd/pi/00730F01 # PCI side of HT root complex chip northbridge/amd/pi/00730F01
device pci 0.0 on end # Root Complex device pci 0.0 on end # Root Complex
device pci 0.2 on end # IOMMU device pci 0.2 on end # IOMMU
device pci 1.0 off end # Internal Graphics P2P bridge 0x9804 device pci 1.0 off end # Internal Graphics P2P bridge 0x9804
device pci 1.1 off end # Internal Multimedia device pci 1.1 off end # Internal Multimedia
device pci 2.0 on end # PCIe Host Bridge device pci 2.0 on end # PCIe Host Bridge
device pci 2.1 on end # LAN1 device pci 2.1 on end # LAN1
device pci 2.2 on end # LAN2 device pci 2.2 on end # LAN2
device pci 2.3 on end # LAN3 device pci 2.3 on end # LAN3
device pci 2.4 on end # LAN4 device pci 2.4 on end # LAN4
device pci 2.5 on end # mPCIe slot 1 device pci 2.5 on end # mPCIe slot 1
device pci 8.0 on end # Platform Security Processor device pci 8.0 on end # Platform Security Processor
end #chip northbridge/amd/pi/00730F01 end #chip northbridge/amd/pi/00730F01
chip southbridge/amd/pi/hudson # it is under NB/SB Link, but on the same pci bus chip southbridge/amd/pi/hudson
device pci 10.0 on end # XHCI HC0 muxed with EHCI 2 device pci 10.0 on end # XHCI HC0 muxed with EHCI 2
device pci 11.0 on end # SATA device pci 11.0 on end # SATA
device pci 12.0 on end # USB EHCI0 usb[0:3] is connected device pci 12.0 on end # USB EHCI0 usb[0:3] is connected
device pci 13.0 on end # USB EHCI1 usb[4:7] device pci 13.0 on end # USB EHCI1 usb[4:7]
device pci 14.0 on end # SM device pci 14.0 on end # SM
device pci 14.3 on # LPC 0x439d device pci 14.3 on # LPC 0x439d
chip superio/nuvoton/nct5104d # SIO NCT5104D chip superio/nuvoton/nct5104d # SIO NCT5104D
register "irq_trigger_type" = "0" register "irq_trigger_type" = "0"
device pnp 2e.0 off end device pnp 2e.0 off end
device pnp 2e.2 on device pnp 2e.2 on
io 0x60 = 0x3f8 io 0x60 = 0x3f8
irq 0x70 = 4 irq 0x70 = 4
end end
device pnp 2e.3 on device pnp 2e.3 on
io 0x60 = 0x2f8 io 0x60 = 0x2f8
irq 0x70 = 3 irq 0x70 = 3
end end
device pnp 2e.10 on device pnp 2e.10 on
# UART C is conditionally turned on # UART C is conditionally turned on
io 0x60 = 0x3e8 io 0x60 = 0x3e8
irq 0x70 = 4 irq 0x70 = 4
end end
device pnp 2e.11 on device pnp 2e.11 on
# UART D is conditionally turned on # UART D is conditionally turned on
io 0x60 = 0x2e8 io 0x60 = 0x2e8
irq 0x70 = 3 irq 0x70 = 3
end end
device pnp 2e.8 off end device pnp 2e.8 off end
device pnp 2e.f off end device pnp 2e.f off end
# GPIO0 and GPIO1 are conditionally turned on # GPIO0 and GPIO1 are conditionally turned on
device pnp 2e.007 on end device pnp 2e.007 on end
device pnp 2e.107 on end device pnp 2e.107 on end
device pnp 2e.607 off end device pnp 2e.607 off end
device pnp 2e.e off end device pnp 2e.e off end
end # SIO NCT5104D end # SIO NCT5104D
end # LPC 0x439d end # LPC 0x439d
device pci 14.7 on end # SD device pci 14.7 on end # SD
device pci 16.0 on end # USB EHCI2 usb[8:7] - muxed with XHCI device pci 16.0 on end # USB EHCI2 usb[8:7] - muxed with XHCI
end #chip southbridge/amd/pi/hudson end #chip southbridge/amd/pi/hudson
device pci 18.0 on end device pci 18.0 on end
device pci 18.1 on end device pci 18.1 on end
device pci 18.2 on end device pci 18.2 on end
device pci 18.3 on end device pci 18.3 on end
device pci 18.4 on end device pci 18.4 on end
device pci 18.5 on end device pci 18.5 on end
end #chip northbridge/amd/pi/00730F01 # CPU side of HT root complex
end #domain end #domain
end #northbridge/amd/pi/00730F01/root_complex end #northbridge/amd/pi/00730F01/root_complex

124
src/mainboard/pcengines/apu2/variants/apu5/devicetree.cb
View File

@ -21,73 +21,71 @@ chip northbridge/amd/pi/00730F01/root_complex
device domain 0 on device domain 0 on
subsystemid 0x1022 0x1410 inherit subsystemid 0x1022 0x1410 inherit
chip northbridge/amd/pi/00730F01 # CPU side of HT root complex
chip northbridge/amd/pi/00730F01 # PCI side of HT root complex chip northbridge/amd/pi/00730F01 # PCI side of HT root complex
device pci 0.0 on end # Root Complex device pci 0.0 on end # Root Complex
device pci 0.2 on end # IOMMU device pci 0.2 on end # IOMMU
device pci 1.0 off end # Internal Graphics P2P bridge 0x9804 device pci 1.0 off end # Internal Graphics P2P bridge 0x9804
device pci 1.1 off end # Internal Multimedia device pci 1.1 off end # Internal Multimedia
device pci 2.0 on end # PCIe Host Bridge device pci 2.0 on end # PCIe Host Bridge
device pci 2.1 on end # mPCIe slot 2 (on GFX lane) device pci 2.1 on end # mPCIe slot 2 (on GFX lane)
device pci 2.2 on end # LAN3 device pci 2.2 on end # LAN3
device pci 2.3 on end # LAN2 device pci 2.3 on end # LAN2
device pci 2.4 on end # LAN1 device pci 2.4 on end # LAN1
device pci 2.5 on end # mPCIe slot 1 device pci 2.5 on end # mPCIe slot 1
device pci 8.0 on end # Platform Security Processor device pci 8.0 on end # Platform Security Processor
end #chip northbridge/amd/pi/00730F01 end #chip northbridge/amd/pi/00730F01
chip southbridge/amd/pi/hudson # it is under NB/SB Link, but on the same pci bus chip southbridge/amd/pi/hudson # it is under NB/SB Link, but on the same pci bus
device pci 10.0 on end # XHCI HC0 muxed with EHCI 2 device pci 10.0 on end # XHCI HC0 muxed with EHCI 2
device pci 11.0 on end # SATA device pci 11.0 on end # SATA
device pci 12.0 on end # USB EHCI0 usb[0:3] is connected device pci 12.0 on end # USB EHCI0 usb[0:3] is connected
device pci 13.0 on end # USB EHCI1 usb[4:7] device pci 13.0 on end # USB EHCI1 usb[4:7]
device pci 14.0 on end # SM device pci 14.0 on end # SM
device pci 14.3 on # LPC 0x439d device pci 14.3 on # LPC 0x439d
chip superio/nuvoton/nct5104d # SIO NCT5104D chip superio/nuvoton/nct5104d # SIO NCT5104D
register "irq_trigger_type" = "0" register "irq_trigger_type" = "0"
device pnp 2e.0 off end device pnp 2e.0 off end
device pnp 2e.2 on device pnp 2e.2 on
io 0x60 = 0x3f8 io 0x60 = 0x3f8
irq 0x70 = 4 irq 0x70 = 4
end end
device pnp 2e.3 on device pnp 2e.3 on
io 0x60 = 0x2f8 io 0x60 = 0x2f8
irq 0x70 = 3 irq 0x70 = 3
end end
device pnp 2e.10 on device pnp 2e.10 on
# UART C is conditionally turned on # UART C is conditionally turned on
io 0x60 = 0x3e8 io 0x60 = 0x3e8
irq 0x70 = 4 irq 0x70 = 4
end end
device pnp 2e.11 on device pnp 2e.11 on
# UART D is conditionally turned on # UART D is conditionally turned on
io 0x60 = 0x2e8 io 0x60 = 0x2e8
irq 0x70 = 3 irq 0x70 = 3
end end
device pnp 2e.8 off end device pnp 2e.8 off end
device pnp 2e.f off end device pnp 2e.f off end
device pnp 2e.007 off end device pnp 2e.007 off end
device pnp 2e.107 off end device pnp 2e.107 off end
device pnp 2e.607 off end device pnp 2e.607 off end
device pnp 2e.e off end device pnp 2e.e off end
end # SIO NCT5104D end # SIO NCT5104D
chip drivers/pc80/tpm chip drivers/pc80/tpm
device pnp 0c31.0 on end device pnp 0c31.0 on end
end # LPC TPM end # LPC TPM
end # LPC 0x439d end # LPC 0x439d
device pci 14.7 off end # SD device pci 14.7 off end # SD
device pci 16.0 on end # USB EHCI2 usb[8:7] - muxed with XHCI device pci 16.0 on end # USB EHCI2 usb[8:7] - muxed with XHCI
end #chip southbridge/amd/pi/hudson end #chip southbridge/amd/pi/hudson
device pci 18.0 on end device pci 18.0 on end
device pci 18.1 on end device pci 18.1 on end
device pci 18.2 on end device pci 18.2 on end
device pci 18.3 on end device pci 18.3 on end
device pci 18.4 on end device pci 18.4 on end
device pci 18.5 on end device pci 18.5 on end
end #chip northbridge/amd/pi/00730F01 # CPU side of HT root complex
end #domain end #domain
end #northbridge/amd/pi/00730F01/root_complex end #northbridge/amd/pi/00730F01/root_complex